He Tang

Orcid: 0000-0001-8624-5671

Affiliations:
  • University of Electronic Science and Technology of China, Chengdu, Sichuan, China


According to our database1, He Tang authored at least 39 papers between 2010 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
A Neural Network-Enhanced Digital Background Calibration Algorithm for Residue Amplifier Nonlinearity in Pipelined ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2025

Kolmogorov-Arnold Networks-Based Calibration for Single-Channel ADCs: High-Precision Nonlinear Code Synthesis With Low Power Consumption.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2025

A Novel NN-Based Fast-Convergence Background Calibration for Timing Mismatch in TI ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

2024
A New Artificial Neural Network-Based Calibration Mechanism for ADCs: A Time-Interleaved ADC Case Study.
IEEE Trans. Very Large Scale Integr. Syst., July, 2024

A Novel Calibration Algorithm for ADCs Based on Inverse Mapping by Neural Network.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2024

2023
A Novel Two-Stage Timing Mismatch Calibration Technique for Time-Interleaved ADCs.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023

2022
DBP: Distributed Power Budgeting for Many-Core Systems in Dark Silicon.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021
A Timing Mismatch Background Calibration Algorithm With Improved Accuracy.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Runtime Performance Optimization of 3-D Microprocessors in Dark Silicon.
IEEE Trans. Computers, 2021

2020
Low-Power, Low-Noise Edge-Race Comparator for SAR ADCs.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Compact Piecewise Linear Model Based Temperature Control of Multicore Systems Considering Leakage Power.
IEEE Trans. Ind. Informatics, 2020

Voltage Comparator With 60% Faster Speed by Using Charge Pump.
IEEE Trans. Circuits Syst., 2020

A 8.2-pW 2.4-pA Current Reference Operating at 0.5 V With No Amplifiers or Resistors.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Leakage-Aware Predictive Thermal Management for Multicore Systems Using Echo State Network.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
A Low-Power Low-Cost On-Chip Digital Background Calibration for Pipelined ADCs.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Runtime Stress Estimation for Three-dimensional IC Reliability Management Using Artificial Neural Network.
ACM Trans. Design Autom. Electr. Syst., 2019

STREAM: Stress and Thermal Aware Reliability Management for 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

GDP: A Greedy Based Dynamic Power Budgeting Method for Multi/Many-Core Systems in Dark Silicon.
IEEE Trans. Computers, 2019

A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting.
IEEE J. Solid State Circuits, 2019

Leakage-aware thermal management for multi-core systems using piecewise linear model based predictive control.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
A Fast Leakage-Aware Full-Chip Transient Thermal Estimation Method.
IEEE Trans. Computers, 2018

A 0.5-nW 29ppm/°C Voltage Reference Circuit.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
A quantitative design methodology for high-speed interpolation/averaging ADCs.
Integr., 2017

2016
Hierarchical Dynamic Thermal Management Method for High-Performance Many-Core Microprocessors.
ACM Trans. Design Autom. Electr. Syst., 2016

A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2015
Function-based ESD protection circuit design verification for BGA pad-ring array.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
A new segmentation-based GPU-accelerated sparse matrix-vector multiplication.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Scalable behavior modeling for SCR based ESD protection structures for circuit simulation.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Hybrid dynamic thermal management method with model predictive control.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
Post-Si Programmable ESD Protection Circuit Design: Mechanisms and Analysis.
IEEE J. Solid State Circuits, 2013

Quantitative analysis for high speed interpolated/averaging ADC.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

Distributed task migration for thermal hot spot reduction in many-core microprocessors.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2011
ESD-Protected Power Amplifier Design in CMOS for Highly Reliable RF ICs.
IEEE Trans. Ind. Electron., 2011

Design and Analysis of Low-Voltage Low-Parasitic ESD Protection for RF ICs in CMOS.
IEEE J. Solid State Circuits, 2011

Design Matrix Analysis for Capacitive Interpolation Flash ADC.
J. Low Power Electron., 2011

Co-design of ESD protection and UWB RF front-end ICs.
Sci. China Inf. Sci., 2011

Low power 3.1-10.6 GHz IR-UWB transmitter for Gbps wireless communications.
Sci. China Inf. Sci., 2011

2010
A 52-mW 3.1-10.6-GHz Fully Integrated Correlator for IR-UWB Transceivers in 0.18 μm CMOS.
IEEE Trans. Ind. Electron., 2010

1.8 pJ/Pulse Programmable Gaussian Pulse Generator for Full-Band Noncarrier Impulse-UWB Transceivers in 90-nm CMOS.
IEEE Trans. Ind. Electron., 2010


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