Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors. - Kenneth L. Shepard; Sean M. Carey; Ee Kin Cho; Brian W. Curran; Robert F. Hatch; Dale E. Hoffman; Scott A. McCabe; Gregory A. Northrop; A. E. (Rick) Seigler (IBM J. Res. Dev., 1997)

The S/390 G5/G6 binodal cache. - Paul R. Turgeon; Pak-kin Mak; Michael A. Blake; Michael F. Fee; Carl B. Ford III; Patrick J. Meaney; A. E. (Rick) Seigler; William Wu Shen (IBM J. Res. Dev., 1999)

Processor subsystem interconnect architecture for a large symmetric multiprocessing system. - Pak-kin Mak; Gary E. Strait; Michael A. Blake; Kevin W. Kark; Vesselina K. Papazova; A. E. (Rick) Seigler; Gary A. Van Huben; Liyong Wang; George C. Wellwood (IBM J. Res. Dev., 2004)

Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning. - Tilman Glökler; Jason Baumgartner; Devi Shanmugam; A. E. (Rick) Seigler; Gary A. Van Huben; Barinjato Ramanandray; Hari Mony; Paul Roessler (FMCAD, 2006)

Formal Verification of Partial Good Self-Test Fencing Structures. - Adrian E. Seigler; Gary A. Van Huben; Hari Mony (FMCAD, 2007)