A. Ege Engin

According to our database1, A. Ege Engin authored at least 10 papers between 2005 and 2013.

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Bibliography

2013
Equivalent circuit model extraction for interconnects in 3D ICs.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2011
Prediction and Comparison of High-Performance On-Chip Global Interconnection.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Metal semiconductor (MES) TSVs in 3D ICs: Electrical modeling and design.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
Worst-case noise prediction with non-zero current transition times for early power distribution system verification.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

On-chip power network optimization with decoupling capacitors and controlled-ESRs.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Predicting the worst-case voltage violation in a 3D power network.
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009

Prediction of high-performance on-chip global interconnection.
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009

On the bound of time-domain power supply noise based on frequency-domain target impedance.
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009

3D stacked power distribution considering substrate coupling.
Proceedings of the 27th International Conference on Computer Design, 2009

2005
Closed-form network representations of frequency-dependent <i>RLGC</i> parameters.
Int. J. Circuit Theory Appl., 2005


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