CCD Charge-Coupled Device Memories: A Perspective. - Dileep Bhandarkar; J. Brock Barton; A. F. Tasch Jr. (Computer, 1979)

Memory cell and technology issues for 64- and 256-Mbit one-transistor cell MOSD DRAMs. - A. F. Tasch Jr.; Laureen H. Parker (Proc. IEEE, 1989)

A universal MOSFET mobility degradation model for circuit simulation. - Gregory Munson Yeric; A. F. Tasch Jr.; Sanjay K. Banerjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Universal MOSFET hole mobility degradation models for circuit simulation. - Victor Martin Agostinelli Jr.; Gregory Munson Yeric; A. F. Tasch Jr. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Improved universal MOSFET electron mobility degradation models for circuit simulation. - C. Patrick Yue; Victor Martin Agostinelli Jr.; Gregory Munson Yeric; A. F. Tasch Jr. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Study of Electron Velocity Overshoot in NMOS Inversion Layers. - Wei-Kai Shih; Srinivas Jallepalli; Mahbub Rashed; Christine M. Maziar; A. F. Tasch Jr. (VLSI Design, 1998)

A Monte Carlo Study of Electron Transport in Silicon nMOSFET Inversion Layers. - Wei-Kai Shih; Srinivas Jallepalli; C.-F. Yeap; Mahbub Rashed; Christine M. Maziar; A. F. Tasch Jr. (VLSI Design, 1998)

Hydrodynamic (HD) Simulation of N-Channel MOSFET's with a Computationally Efficient Inversion Layer Quantization Model. - Haihong Wang; Wei-Kai Shih; Susan Green; Scott Hareland; Christine M. Maziar; A. F. Tasch Jr. (VLSI Design, 1998)