Gate voltage and oxide thickness dependence of progressive wear-out of ultra-thin gate oxides. - T. Pompl; A. Kerber; M. Röhner; Martin Kerber (Microelectron. Reliab., 2006)

Reliability screening of high-k dielectrics based on voltage ramp stress. - A. Kerber; Luigi Pantisano; Anabela Veloso; Guido Groeseneken; Martin Kerber (Microelectron. Reliab., 2007)

Impact of RTN on stochastic BTI degradation in scaled metal gate/high-k CMOS technologies. - A. Kerber (IRPS, 2015)

NBTI in Si0.5Ge0.5 RMG gate stacks - Effect of high-k nitridation. - P. Srinivasan; J. Fronheiser; S. Siddiqui; A. Kerber; L. F. Edge; Richard G. Southwick; Eduard Cartier (IRPS, 2015)

Ambient temperature and layout impact on self-heating characterization in FinFET devices. - Peter C. Paliwoda; Zakariae Chbili; A. Kerber; D. Singh; Durga Misra (IRPS, 2018)

Bottom-up methodology for predictive simulations of self-heating in aggressively scaled process technologies. - D. Singh; Oscar D. Restrepo; P. P. Manik; N. Rao Mavilla; H. Zhang; Peter C. Paliwoda; S. Pinkett; Y. Deng; Eduardo Cruz Silva; Jeffrey B. Johnson; M. Bajaj; S. Furkay; et al. (IRPS, 2018)