Novel Low and High Threshold TFET Based NTI and PTI Cells Benchmarked with Standard 45 nm CMOS Technology for Ternary Logic Applications. - Ramakant Ramakant; Sanjay Vidhyadharan; A. Krishna Shyam; Mohit P. Hirpara; Tanmay Chaudhary; Surya Shankar Dan (VLSID, 2019)

An Efficient Design Approach for Implementation of 2 Bit Ternary Flash ADC Using Optimized Complementary TFET Devices. - Sanjay Vidhyadharan; Ramakant Ramakant; Abhay S. Vidhyadharan; A. Krishna Shyam; Mohit P. Hirpara; Surya Shankar Dan (VLSID, 2019)