Parallel Partitioning Techniques for Logic Minimization Using Redundancy Identification. - B. Jayaram 002; A. Manoj Kumar; V. Kamakoti 001 (HiPC, 2003)

MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis. - A. Manoj Kumar; Jayaram Bobba; V. Kamakoti 001 (DATE, 2004)

SHAPER: synthesis for hybrid FPGA architectures containing PLA elements using reconvergence analysis. - A. Manoj Kumar; B. Jayaram 002; V. Kamakoti 001 (FPGA, 2004)

MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Blocks. - R. Manimegalai; A. Manoj Kumar; B. Jayaram 002; V. Kamakoti 001 (FPL, 2004)

SHAPER: synthesis for hybrid FPGAs containing PLAs using reconvergence analysis. - R. Manimegalai; B. Jayaram 002; A. Manoj Kumar; V. Kamakoti 001 (FPT, 2004)

MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Arrays. - A. Manoj Kumar; B. Jayaram 002; R. Manimegalai; V. Kamakoti 001 (IPDPS, 2004)