Implementation of multi-precision floating point divider for high speed signal processing applications. - C. Ravi Shankar Hanuman; J. Kamala; A. R. Aruna (J. Supercomput., 2019)

Implementation of high precision/low latency FP divider using Urdhva-Tiryakbhyam multiplier for SoC applications. - C. Ravi Shankar Hanuman; J. Kamala; A. R. Aruna (Des. Autom. Embed. Syst., 2020)