The VLSI design challenge of the 80's (Position Statement). - A. Richard Newton (DAC, 1980)

KIC2: A Low-Cost, Interactive Editor for Integrated Circuit Design. - Kenneth H. Keller; A. Richard Newton (COMPCON, 1982)

Techniques for programmable logic array folding. - Gary D. Hachtel; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (DAC, 1982)

A symbolic design system for integrated circuits. - Kenneth H. Keller; A. Richard Newton; S. Ellis (DAC, 1982)

An Algorithm for Optimal PLA Folding. - Gary D. Hachtel; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1982)

Symmetric Displacement Algorithms for the Timing Analysis of Large Scale Circuits. - Giovanni De Micheli; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983)

A multiprocessor implementation of relaxation-based electrical circuit simulation. - Jeffrey T. Deutsch; A. Richard Newton (DAC, 1984)

Relaxation-Based Electrical Simulation. - A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984)

Design Aids for VLSI: A Perspective Revisited. - A. Richard Newton; Donald O. Pederson; Alberto L. Sangiovanni-Vincentelli (IEEE Des. Test, 1985)

GENIE: a generalized array optimizer for VLSI synthesis. - Srinivas Devadas; A. Richard Newton (DAC, 1986)

An accuration delay modeling technique for switch-level timing verification. - Seung Ho Hwang; Young Hwan Kim; A. Richard Newton (DAC, 1986)

An empirical analysis of the performance of a multiprocessor-based circuit simulator. - George K. Jacob; A. Richard Newton; Donald O. Pederson (DAC, 1986)

Highlights of VLSI Research at Berkeley. - Carlo H. Séquin; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (FJCC, 1986)

Computer-Aided Design for VLSI Circuits. - A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (Computer, 1986)

KAHLUA: A Hierarchical Circuit Disassembler. - Bill Lin 001; A. Richard Newton (DAC, 1987)

Topological Optimization of Multiple-Level Array Logic. - Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

Twenty-Five Years of Electronic Design Automation. - A. Richard Newton (DAC, 1988)

Boolean decomposition in multi-level logic optimization. - Srinivas Devadas; Albert R. Wang; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (ICCAD, 1988)

A modified approach to two-level logic minimization. - Abdul A. Malik; Robert K. Brayton; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (ICCAD, 1988)

Critic: a knowledge-based program for critiquing circuit designs. - Rick L. Spickelmier; A. Richard Newton (ICCD, 1988)

Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (ITC, 1988)

An Incomplete Scan Design Approach to Test Generation for Sequential Machines. - Hi-Keung Tony Ma; A. Richard Newton; Srinivas Devadas; Alberto L. Sangiovanni-Vincentelli (ITC, 1988)

On the verification of sequential machines at differing levels of abstraction. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Test generation for sequential circuits. - Hi-Keung Tony Ma; Srinivas Devadas; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Protection and Versioning for OCT. - Mário J. Silva; David Gedye; Randy H. Katz; Richard Newton 001 (DAC, 1989)

Easily testable PLA-based finite state machines. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton (FTCS, 1989)

Optimum and heuristic algorithms for finite state machine decomposition and partitioning. - Pranav Ashar; Srinivas Devadas; A. Richard Newton (ICCAD, 1989)

SLIP: a software environment for system level interactive partitioning. - Mark Beardslee; Chuck Kring; Rajeev Murgai; Hamid Savoj; Robert K. Brayton; A. Richard Newton (ICCAD, 1989)

Test generation for highly sequential circuits. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (ICCAD, 1989)

A generalized approach to the constrained cubical embedding problem. - Bill Lin 001; A. Richard Newton (ICCD, 1989)

A synthesis and optimization procedure for fully and easily testable sequential machines. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Algorithms for hardware allocation in data path synthesis. - Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Decomposition and factorization of sequential finite state machines. - Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Electrical-logic simulation and its applications. - Young Hwan Kim; Seung Ho Hwang; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation. - Resve A. Saleh; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Boolean decomposition in multilevel logic optimization. - Srinivas Devadas; Albert R. Wang; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE J. Solid State Circuits, 1989)

A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. - Pranav Ashar; Srinivas Devadas; A. Richard Newton (DAC, 1990)

Design Management Based on Design Traces. - Andrea Casotto; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (DAC, 1990)

Verification of Interacting Sequential Circuits. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (DAC, 1990)

Sequential Test Generation at the Register-Transfer and Logic Levels. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (DAC, 1990)

Reduced Offsets for Two-Level Multi-Valued Logic Minimization. - Abdul A. Malik; Robert K. Brayton; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (DAC, 1990)

Standards, Openness and Design Environments in Electronic Design Automation (Panel Abstract). - A. Richard Newton (DAC, 1990)

Abstract Data Types and High-Level Synthesis. - Gregory S. Whitcomb; A. Richard Newton (DAC, 1990)

Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test. - Pranav Ashar; Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (ICCAD, 1990)

Don't Care Minimization of Multi-Level Sequential Logic Networks. - Bill Lin 001; Hervé J. Touati; A. Richard Newton (ICCAD, 1990)

Testability driven synthesis of interacting finite state machines. - Pranav Ashar; Srinivas Devadas; A. Richard Newton (ICCD, 1990)

An Empirical Evaluation of Two Memory-Efficient Directory Methods. - Brian W. O'Krafka; A. Richard Newton (ISCA, 1990)

Sequential logic synthesis for testability using register-transfer level descriptions. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (ITC, 1990)

Redundancies and don't cares in sequential logic synthesis. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton (J. Electron. Test., 1990)

Irredundant sequential machines via optimal logic synthesis. - Srinivas Devadas; Hi-Keung Tony Ma; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

A circuit disassembly technique for synthesizing symbolic layouts from mask descriptions. - Bill Lin 001; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas. - Takayasu Sakurai; A. Richard Newton (IEEE J. Solid State Circuits, 1990)

Framework Standards: How Important are They? (Panel Abstract). - A. Richard Newton (DAC, 1991)

A Cell-Replicating Approach to Minicut-Based Circuit Partitioning. - Chuck Kring; A. Richard Newton (ICCAD, 1991)

An Impulse-Response Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation. - Jaijeet S. Roychowdhury; A. Richard Newton; Donald O. Pederson (ICCAD, 1991)

Implicit Manipulation of Equivalence Classes Using Binary Decision Diagrams. - Bill Lin 001; A. Richard Newton (ICCD, 1991)

Exact Redundant State Registers Removal Based on Binary Decision Diagrams. - Bill Lin 001; A. Richard Newton (VLSI, 1991)

Has CAD for VLSI Reached a Dead End? - A. Richard Newton (VLSI, 1991)

Optimum and heuristic algorithms for an approach to finite state machine decomposition. - Pranav Ashar; Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Irredundant interacting sequential machines via optimal logic synthesis. - Pranav Ashar; Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Exact algorithms for output encoding, state assignment, and four-level Boolean minimization. - Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

MUSE: a multilevel symbolic encoding algorithm for state assignment. - Xuejun Du; Gary D. Hachtel; Bill Lin 001; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Test generation and verification for highly sequential circuits. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

An efficient verifier for finite state machines. - Seung Ho Hwang; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Reduced offsets for minimization of binary-valued functions. - Abdul A. Malik; Robert K. Brayton; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Delay analysis of series-connected MOSFET circuits. - Takayasu Sakurai; A. Richard Newton (IEEE J. Solid State Circuits, 1991)

Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time. - Jaijeet S. Roychowdhury; A. Richard Newton; Donald O. Pederson (DAC, 1992)

Experiments on the synthesis and testability of non-scan finite state machines. - Michael Pabst; Tiziano Villa; A. Richard Newton (EURO-DAC, 1992)

An exact analytic technique for simulating uniform RC lines. - Jaijeet S. Roychowdhury; A. Richard Newton; Donald O. Pederson (EURO-DAC, 1992)

Heuristic minimization of Boolean relations using testing techniques. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Fast simulated diffusion: an optimization algorithm for multiminimum problems and its application to MOSFET model parameter extraction. - Takayasu Sakurai; Bill Lin 001; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Two-Level Minimization of Multivalued Functions with Large Offsets. - Abdul A. Malik; Robert K. Brayton; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Computers, 1993)

Sequential test generation and synthesis for testability at the register-transfer and logic levels. - Abhijit Ghosh; Srinivas Devadas; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Mixed-mode simulation and analog multilevel simulation. - Resve A. Saleh; Shyh-Jye Jou; A. Richard Newton (Kluwer, 1994)

TOBAC: A Test Case Browser for Testing Object-Oriented Software. - Ernst Siepmann; A. Richard Newton (ISSTA, 1994)

Algorithms for the transient simulation of lossy interconnect. - Jaijeet S. Roychowdhury; A. Richard Newton; Donald O. Pederson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

An estimation technique to guide low power resynthesis algorithms. - Christopher K. Lennard; A. Richard Newton (ISLPD, 1995)

The maximal VHDL subset with a cycle-level abstraction. - Wendell C. Baker; A. Richard Newton (EURO-DAC, 1996)

Logic synthesis using power-sensitive don't care sets. - Christopher K. Lennard; Premal Buch; A. Richard Newton (ISLPED, 1996)

On estimation accuracy for guiding low-power resynthesis. - Christopher K. Lennard; A. Richard Newton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Logic synthesis for large pass transistor circuits. - Premal Buch; Amit Narayan; A. Richard Newton; Alberto L. Sangiovanni-Vincentelli (ICCAD, 1997)

Adaptive methods for netlist partitioning. - Wray L. Buntine; Lixin Su; A. Richard Newton; Andrew Mayer (ICCAD, 1997)

EDA and the network. - Mark D. Spiller; A. Richard Newton (ICCAD, 1997)

Engineering change for power optimization using global sensitivity and synthesis flexibility. - Premal Buch; Christopher K. Lennard; A. Richard Newton (ISLPED, 1997)

The future of logic synthesis and physical design in deep-submicron process geometries. - Kurt Keutzer; A. Richard Newton; Narendra V. Shenoy (ISPD, 1997)

Formal methods into practice: case studies in the application of the B method. - Juan Bicarregui; D. L. Clutterbuck; Gavin R. Finnie; Howard P. Haughton; Kevin Lano; H. Lesan; D. W. R. M. Marsh; B. M. Matthews; Michael R. Moulding; A. Richard Newton; Brian Ritchie; T. G. A. Rushton; et al. (IEE Proc. Softw. Eng., 1997)

WELD - An Environment for Web-based Electronic Design. - Francis L. Chan; Mark D. Spiller; A. Richard Newton (DAC, 1998)

Technical Challenges of IP and System-on-Chip: The ASIC Vendor Perspective (Panel). - A. Richard Newton (DAC, 1998)

Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement. - James Shin Young; Josh MacDonald; Michael Shilman; Abdallah Tabbara; Paul N. Hilfinger; A. Richard Newton (DAC, 1998)

Learning as applied to stochastic optimization for standard cell placement. - Lixin Su; Wray L. Buntine; A. Richard Newton; Bradley S. Peters (ICCD, 1998)

Retiming for DSM with Area-Delay Trade-Offs and Delay Constraints. - Abdallah Tabbara; Robert K. Brayton; A. Richard Newton (DAC, 1999)

The MARCO/DARPA Gigascale Silicon Research Center. - Kurt Keutzer; A. Richard Newton (ICCD, 1999)

Retargetable estimation scheme for DSP architecture selection. - Naji Ghazal; A. Richard Newton; Jan M. Rabaey (ASP-DAC, 2000)

Predicting performance potential of modern DSPs. - Naji Ghazal; A. Richard Newton; Jan M. Rabaey (DAC, 2000)

Embedded systems design in the new millennium (panel session). - A. Richard Newton; Walden C. Rhines; Sünke Mehrgardt; Henry Samueli; Tudor Brown (DAC, 2000)

Integration of retiming with architectural floorplanning. - Abdallah Tabbara; Bassam Tabbara; Robert K. Brayton; A. Richard Newton (Integr., 2000)

System-level design: orthogonalization of concerns andplatform-based design. - Kurt Keutzer; A. Richard Newton; Jan M. Rabaey; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Limitations and challenges of computer-aided design technology for CMOS VLSI. - Randal E. Bryant; Kwang-Ting Cheng; Andrew B. Kahng; Kurt Keutzer; Wojciech Maly; A. Richard Newton; Lawrence T. Pileggi; Jan M. Rabaey; Alberto L. Sangiovanni-Vincentelli (Proc. IEEE, 2001)

Learning as applied to stochastic optimization for standard-cellplacement. - Lixin Su; Wray L. Buntine; A. Richard Newton; Bradley S. Peters (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

From ASIC to ASIP: The Next Design Discontinuity. - Kurt Keutzer; Sharad Malik; A. Richard Newton (ICCD, 2002)

Great works for the 21st century: a critical role for the modern research university. - A. Richard Newton (EMSOFT, 2004)

Sketched Symbol Recognition using Zernike Moments. - Heloise Hwawen Hse; A. Richard Newton (ICPR (1), 2004)

Digital Image Restoration by Exposure-Splitting and Registration. - Zile Wei; Yu Cao; A. Richard Newton (ICPR (4), 2004)

Robust sketched symbol fragmentation using templates. - Heloise Hwawen Hse; Michael Shilman; A. Richard Newton (IUI, 2004)

Recognition and beautification of multi-stroke symbols in digital ink. - Heloise Hwawen Hse; A. Richard Newton (Comput. Graph., 2005)

Fast Boolean Matching with Don't Cares. - Zile Wei; Donald Chai; A. Richard Newton; Andreas Kuehlmann (ISQED, 2006)