Beyond-Si materials and devices for more Moore and more than Moore applications. - Nadine Collaert; AliReza Alian; Hiroaki Arimura; Geert Boccardi; Geert Eneman; Jacopo Franco; Tsvetan Ivanov; Dennis Lin; Jérôme Mitard; S. Ramesh; R. Rooyackers; Marc Schaekers; et al. (ICICDT, 2016)

Scaling CMOS beyond Si FinFET: an analog/RF perspective. - Bertrand Parvais; Geert Hellings; Marko Simicic; Pieter Weckx; Jérôme Mitard; Doyoung Jang; V. Deshpande; B. van Liempc; Anabela Veloso; A. Vandooren; Niamh Waldron; Piet Wambacq; et al. (ESSDERC, 2018)

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. - A. Vandooren; Liesbeth Witters; Jacopo Franco; Arindam Mallik; Bertrand Parvais; Z. Wu; Amey Walke; V. Deshpande; E. Rosseel; Andriy Hikavyy; W. Li; L. Peng; et al. (ICICDT, 2018)

Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper. - Jacopo Franco; Hiroaki Arimura; J.-F. de Marneffe; A. Vandooren; L.-Å. Ragnarsson; Zhicheng Wu; Dieter Claes; E. Dentoni Litta; N. Horiguchi; Kris Croes; Dimitri Linten; Tibor Grasser; et al. (ICICDT, 2021)

Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections. - A. Vandooren; N. Parihar; Jacopo Franco; Roger Loo; Hiroaki Arimura; R. Rodriguez; F. Sebaai; S. Iacovo; Kevin Vandersmissen; W. Li; G. Mannaert; D. Radisic; et al. (VLSI Technology and Circuits, 2022)

Reliability challenges in Forksheet Devices: (Invited Paper). - Erik Bury; Michiel Vandemaele; Jacopo Franco; Adrian Chasin; Stanislav Tyaginov; A. Vandooren; Romain Ritzenthaler; Hans Mertens; Javier Diaz-Fortuny; N. Horiguchi; Dimitri Linten; Ben Kaczer (IRPS, 2023)

Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET. - Hiroaki Arimura; S. Brus; Jacopo Franco; Yusuke Oniki; A. Vandooren; T. Conard; B. T. Chan; B. Kannan; M. Samiee; W. Li; P. Deminskyi; E. Shero; et al. (VLSI Technology and Circuits, 2023)

Monolithic Complementary Field Effect Transistors (CFET) Demonstrated using Middle Dielectric Isolation and Stacked Contacts. - Steven Demuynck; Victor Vega-Gonzalez; C. Toledo de Carvalho Cavalcante; L. Petersen Barbosa Lima; K. Stiers; C. Sheng; A. Vandooren; M. Hosseini; X. Zhou; Hans Mertens; Thomas Chiarella; Jürgen Bömmels; et al. (VLSI Technology and Circuits, 2024)