A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter. - Mario Mercandelli; Alessio Santiccioli; Simone Mattia Dartizio; Abanob Shehata; Francesco Tesolin; Saleh Karman; Luca Bertulessi; Francesco Buccoleri; Luca Avallone; Angelo Parisi; Andrea Leonardo Lacaita; Michael Peter Kennedy; et al. (ISSCC, 2021)

32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays. - Alessio Santiccioli; Mario Mercandelli; Simone Mattia Dartizio; Francesco Tesolin; Saleh Karman; Abanob Shehata; Luca Bertulessi; Francesco Buccoleri; Luca Avallone; Angelo Parisi; Dmytro Cherniak; Andrea L. Lacaita; et al. (ISSCC, 2021)

A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping. - Simone Mattia Dartizio; Francesco Tesolin; Mario Mercandelli; Alessio Santiccioli; Abanob Shehata; Saleh Karman; Luca Bertulessi; Francesco Buccoleri; Luca Avallone; Angelo Parisi; Andrea L. Lacaita; Michael Peter Kennedy; et al. (IEEE J. Solid State Circuits, 2022)

A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough Suppression. - Chun Wang; Ibrahim Abdo; Chenxin Liu; Carrel da Gomez; Hans Herdian; Wenqian Wang; Xi Fu; Dongwon You; Abanob Shehata; Sunghwan Park; Yun Wang 008; Jian Pang; et al. (VLSI Technology and Circuits, 2023)

35-60GHz Switchless IF Bi-Directional Amplifier Using 65nm CMOS for 300GHz-Band Transceivers. - Abanob Shehata; Hans Herdian; Chun Wang; Chenxin Liu; Kazuaki Kunihiro; Hiroyuki Sakai 009; Atsushi Shirane; Kenichi Okada 001 (A-SSCC, 2024)

A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOS. - Takaya Uchino; Yudai Yamazaki; Sunghwan Park; Chenxin Liu; Anyi Tian; Abanob Shehata; Hiroyuki Sakai 009; Kazuaki Kunihiro; Atsushi Shirane; Kenichi Okada 001 (A-SSCC, 2024)

24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOS. - Chun Wang; Hans Herdian; Wenbin Zheng; Chenxin Liu; Jill C. Mayeda; Yuxuan Liu; Olivia Angel Yong; Wenqian Wang; Yuncheng Zhang; Carrel da Gomez; Abanob Shehata; Sena Kato; et al. (ISSCC, 2024)

A Sub-THz Full-Duplex Phased-Array Transceiver With Self-Interference Cancellation and LO Feedthrough Suppression. - Chun Wang; Ibrahim Abdo; Chenxin Liu; Carrel da Gomez; Jill C. Mayeda; Hans Herdian; Wenqian Wang; Xi Fu; Dongwon You; Abanob Shehata; Sunghwan Park; Yun Wang 008; et al. (IEEE J. Solid State Circuits, 2024)