A novel hardware hash unit design for modern microprocessors. - Abbas A. Fairouz; Monther Abusultan; Sunil P. Khatri (ICCD, 2016)

Circuit Level Design of a Hardware Hash Unit for use in Modern Microprocessors. - Abbas A. Fairouz; Monther Abusultan; Sunil P. Khatri (ACM Great Lakes Symposium on VLSI, 2017)

An FPGA-Based Coprocessor for Hash Unit Acceleration. - Abbas A. Fairouz; Sunil P. Khatri (ICCD, 2017)

A Plain-Text Incremental Compression (PIC) Technique with Fast Lookup Ability. - Kunal Bharathi; Harsh Kumar; Abbas A. Fairouz; Ahmad Al Kawam; Sunil P. Khatri (ICCD, 2018)

Comparing Leakage Reduction Techniques for an Asynchronous Network-on-Chip Router. - Abbas A. Fairouz; Monther Abusultan; Amr Elshennawy; Sunil P. Khatri (J. Low Power Electron., 2018)

Hardware Acceleration of Hash Operations in Modern Microprocessors. - Abbas A. Fairouz; Monther Abusultan; Viacheslav V. Fedorov; Sunil P. Khatri (IEEE Trans. Computers, 2021)

TinyBERT for branch prediction in modern microprocessors. - Anwar Alajmi; Bashair AlSarraf; Zainab Abualhassan; Abbas A. Fairouz; Imtiaz Ahmad (Neural Comput. Appl., 2025)