A novel direct digital frequency synthesizer employing complementary dual-phase latch-based architecture. - Abdel Martinez Alonso; Masaya Miyahara; Akira Matsuzawa (ASICON, 2015)

A 10-bit 6.8-GS/s Direct Digital Frequency Synthesizer Employing Complementary Dual-Phase Latch-Based Architecture. - Abdel Martinez Alonso; Masaya Miyahara; Akira Matsuzawa (IEICE Trans. Electron., 2016)

A high-speed DDFS MMIC with frequency, phase and amplitude modulations in 65nm CMOS. - Abdel Martinez Alonso; Masaya Miyahara; Akira Matsuzawa (A-SSCC, 2017)

A 7GS/s direct digital frequency synthesizer with a two-times interleaved RDAC in 65nm CMOS. - Abdel Martinez Alonso; Masaya Miyahara; Akira Matsuzawa (ESSCIRC, 2017)

A 14-b, 850fs Fully Synthesizable Stochastic-Based Branching Time-to-Digital Converter in 65nm CMOS. - Jian Sen Teh; Liter Siek; Abdel Martinez Alonso; Anugerah Firdauzi; Akira Matsuzawa (ISCAS, 2018)

A 7GS/s Complete-DDFS-Solution in 65nm CMOS. - Abdel Martinez Alonso; Masaya Miyahara; Akira Matsuzawa (IEICE Trans. Electron., 2018)

A 12.8-ns-Latency DDFS MMIC With Frequency, Phase, and Amplitude Modulations in 65-nm CMOS. - Abdel Martinez Alonso; Masaya Miyahara; Akira Matsuzawa (IEEE J. Solid State Circuits, 2018)