In-Memory Database Query. - Iason Giannopoulos; Abhairaj Singh; Manuel Le Gallo; Vara Prasad Jonnalagadda; Said Hamdioui; Abu Sebastian (Adv. Intell. Syst., 2020)

Low-Power Memristor-Based Computing for Edge-AI Applications. - Abhairaj Singh; Sumit Diware; Anteneh Gebregiorgis; Rajendra Bishnoi; Francky Catthoor; Rajiv V. Joshi; Said Hamdioui (ISCAS, 2021)

HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing. - Riduan Khaddam-Aljameh; Milos Stanisavljevic; Jordi Fornt Mas; Geethan Karunaratne; Matthias Braendli; Femg Liu; Abhairaj Singh; Silvia M. Müller; Urs Egger; Anastasios Petropoulos; Theodore Antonakopoulos 001; Kevin Brew; et al. (VLSI Circuits, 2021)

SRIF: Scalable and Reliable Integrate and Fire Circuit ADC for Memristor-Based CIM Architectures. - Abhairaj Singh; Muath Abu Lebdeh; Anteneh Gebregiorgis; Rajendra Bishnoi; Rajiv V. Joshi; Said Hamdioui (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

CIM-based Robust Logic Accelerator using 28 nm STT-MRAM Characterization Chip Tape-out. - Abhairaj Singh; Mahdi Zahedi; Taha Shahroodi; Mohit Gupta 004; Anteneh Gebregiorgis; Manu Komalan; Rajiv V. Joshi; Francky Catthoor; Rajendra Bishnoi; Said Hamdioui (AICAS, 2022)

Referencing-in-Array Scheme for RRAM-based CIM Architecture. - Abhairaj Singh; Rajendra Bishnoi; Rajiv V. Joshi; Said Hamdioui (DATE, 2022)

KrakenOnMem: a memristor-augmented HW/SW framework for taxonomic profiling. - Taha Shahroodi; Mahdi Zahedi; Abhairaj Singh; Stephan Wong; Said Hamdioui (ICS, 2022)

Accelerating RRAM Testing with a Low-cost Computation-in-Memory based DFT. - Abhairaj Singh; Moritz Fieback; Rajendra Bishnoi; Filip Bradaric; Anteneh Gebregiorgis; Rajiv V. Joshi; Said Hamdioui (ITC, 2022)

Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs. - Anteneh Gebregiorgis; Abhairaj Singh; Sumit Diware; Rajendra Bishnoi; Said Hamdioui (VLSI-SoC, 2022)

System Design for Computation-in-Memory: From Primitive to Complex Functions. - Mahdi Zahedi; Taha Shahroodi; Geert Custers; Abhairaj Singh; Stephan Wong; Said Hamdioui (VLSI-SoC, 2022)

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. - Manuel Le Gallo; Riduan Khaddam-Aljameh; Milos Stanisavljevic; Athanasios Vasilopoulos; Benedikt Kersting; Martino Dazzi; Geethan Karunaratne; Matthias Braendli; Abhairaj Singh; Silvia M. Mueller; Julian Büchel; Xavier Timoneda Comas; et al. (CoRR, 2022)

A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs. - Mahta Mayahinia; Abhairaj Singh; Christopher Bengel; Stefan Wiefels; Muath Abu Lebdeh; Stephan Menzel; Dirk J. Wouters; Anteneh Gebregiorgis; Rajendra Bishnoi; Rajiv V. Joshi; Said Hamdioui (ACM J. Emerg. Technol. Comput. Syst., 2022)

HERMES-Core - A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs. - Riduan Khaddam-Aljameh; Milos Stanisavljevic; Jordi Fornt Mas; Geethan Karunaratne; Matthias Brändli; Feng Liu; Abhairaj Singh; Silvia M. Müller; Urs Egger; Anastasios Petropoulos; Theodore Antonakopoulos 001; Kevin Brew; et al. (IEEE J. Solid State Circuits, 2022)

Reliability aspects of binary vector-matrix-multiplications using ReRAM devices. - Christopher Bengel; Johannes Mohr; Stefan Wiefels; Abhairaj Singh; Anteneh Gebregiorgis; Rajendra Bishnoi; Said Hamdioui; Rainer Waser; Dirk J. Wouters; Stephan Menzel (Neuromorph. Comput. Eng., 2022)

Energy-efficient In-Memory Address Calculation. - Amirreza Yousefzadeh; Jan Stuijt; Martijn Hijdra; Hsiao-Hsuan Liu; Anteneh Gebregiorgis; Abhairaj Singh; Said Hamdioui; Francky Catthoor (ACM Trans. Archit. Code Optim., 2022)

A 115.1 TOPS/W, 12.1 TOPS/mm2 Computation-in-Memory using Ring-Oscillator based ADC for Edge AI. - Abhairaj Singh; Rajendra Bishnoi; Ali Kaichouhi; Sumit Diware; Rajiv V. Joshi; Said Hamdioui (AICAS, 2023)

Accurate and Energy-Efficient Bit-Slicing for RRAM-Based Neural Networks. - Sumit Diware; Abhairaj Singh; Anteneh Gebregiorgis; Rajiv V. Joshi; Said Hamdioui; Rajendra Bishnoi (IEEE Trans. Emerg. Top. Comput. Intell., 2023)

Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design. - Riccardo Vignali; Riccardo Zurla; Marco Pasotti; Pier Luigi Rolandi; Abhairaj Singh; Manuel Le Gallo; Abu Sebastian; Taekwang Jang; Alessio Antolini; Eleonora Franchi Scarselli; Alessandro Cabrini (IEEE Trans. Circuits Syst. II Express Briefs, 2024)