Adaptive Packet Throttling Technique for Congestion Management in Mesh NoCs. - N. S. Aswathy; R. S. Reshma Raj; Abhijit Das 002; John Jose; V. R. Josna (VDAT, 2017)

Implementation and analysis of hotspot mitigation in mesh NoCs by cost-effective deflection routing technique. - R. S. Reshma Raj; Abhijit Das 002; John Jose (VLSI-SoC, 2017)

Critical Packet Prioritisation by Slack-Aware Re-Routing in On-Chip Networks. - Abhijit Das 002; Sarath Babu 003; John Jose; Sangeetha Jose; Maurizio Palesi (NOCS, 2018)

An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs. - John Jose; Abhijit Das 002 (VLSID, 2018)

Reducing Off-Chip Miss Penalty by Exploiting Underutilised On-Chip Router Buffers. - Abhijit Das 002; Abhishek Kumar; John Jose (ICCD, 2020)

Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-processors. - Abhijit Das 002; Abhishek Kumar; John Jose; Maurizio Palesi (ISVLSI, 2020)

SECTAR: Secure NoC using Trojan Aware Routing. - Manju Rajan; Abhijit Das 002; John Jose; Prabhat Mishra 001 (NOCS, 2020)

Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems. - Abhijit Das 002; John Jose; Prabhat Mishra 001 (CoRR, 2021)

Opportunistic Caching in NoC: Exploring Ways to Reduce Miss Penalty. - Abhijit Das 002; Abhishek Kumar; John Jose; Maurizio Palesi (IEEE Trans. Computers, 2021)

Data Criticality in Multithreaded Applications: An Insight for Many-Core Systems. - Abhijit Das 002; John Jose; Prabhat Mishra 001 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Designing Data-Aware Network-on-Chip for Performance. - Abhijit Das 002; John Jose (ISVLSI, 2022)

LOKI: A Hardware Trojan Affecting Multiple Components of an SoC. - Manju Rajan; Abhijit Das 002; John Jose (ISVLSI, 2022)

Revising NoC in Future Multicore-Based Consumer Electronics for Performance. - Abhijit Das 002; Abhishek Kumar; John Jose; Maurizio Palesi (IEEE Consumer Electron. Mag., 2022)

Multi-Objective Hardware-Mapping Co-Optimisation for Multi-Tenant DNN Accelerators. - Abhijit Das 002; Enrico Russo 002; Maurizio Palesi (CoRR, 2022)

Wireless enabled Inter-Chiplet Communication in DNN Hardware Accelerators. - Maurizio Palesi; Enrico Russo 002; Abhijit Das 002; John Jose (IPDPS Workshops, 2023)

A MAC Protocol with Time Reversal for Wireless Networks within Computing Packages. - Ama Bandara; Abhijit Das 002; Fátima Rodríguez-Galán; Eduard Alarcón; Sergi Abadal (NANOCOM, 2024)

Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-Based Accelerators. - Abhijit Das 002; Enrico Russo 002; Maurizio Palesi (IEEE Trans. Computers, 2024)

Guest Editorial Chip and Package-Scale Communication-Aware Architectures for General-Purpose, Domain-Specific, and Quantum Computing Systems. - Abhijit Das 002; Maurizio Palesi; John Kim 001; Partha Pratim Pande (IEEE J. Emerg. Sel. Topics Circuits Syst., 2024)

Chip and Package-Scale Interconnects for General-Purpose, Domain-Specific, and Quantum Computing Systems - Overview, Challenges, and Opportunities. - Abhijit Das 002; Maurizio Palesi; John Kim 001; Partha Pratim Pande (IEEE J. Emerg. Sel. Topics Circuits Syst., 2024)

A Data-Driven Approach to Dataflow-Aware Online Scheduling for Graph Neural Network Inference. - Pol Puigdemont; Enrico Russo 002; Axel Wassington; Abhijit Das 002; Sergi Abadal; Maurizio Palesi (ASP-DAC, 2025)

Communication Characterization of AI Workloads for Large-scale Multi-chiplet Accelerators. - Mariam Musavi; Emmanuel Irabor; Abhijit Das 002; Eduard Alarcón; Sergi Abadal (ISCAS, 2025)

Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators. - Emmanuel Irabor; Mariam Musavi; Abhijit Das 002; Sergi Abadal (CoRR, 2025)

TRMAC: A Time-Reversal-based MAC Protocol for Wireless Networks within Computing Packages. - Ama Bandara; Abhijit Das 002; Fátima Rodríguez-Galán; Eduard Alarcón; Sergi Abadal (CoRR, 2025)

Securing Network-on-Chips against Trojan-Induced Packet Duplication Attacks. - Manju Rajan; Abhijit Das 002; John Jose (ACM Trans. Design Autom. Electr. Syst., 2025)