A Multiresolution Model of Auditory Excitation Pattern and Its Application to Objective Evaluation of Perceived Speech Quality. - Abhijit Karmakar; Arun Kumar 007; R. K. Patney (IEEE Trans. Speech Audio Process., 2006)

Design of an Optimal Two-Channel Orthogonal Cyclic Filterbank Using Semidefinite Programming. - Abhijit Karmakar; Arun Kumar 007; R. K. Patney (J. Sel. Topics Signal Processing, 2007)

Design of Optimal Wavelet Packet Trees Based on Auditory Perception Criterion. - Abhijit Karmakar; Arun Kumar 007; R. K. Patney (IEEE Signal Process. Lett., 2007)

Design of an Optimal Two-Channel Orthogonal Filterbank Using Semidefinite Programming. - Abhijit Karmakar; Arun Kumar 007; R. K. Patney (IEEE Signal Process. Lett., 2007)

Synthesis of an Optimal Wavelet Based on Auditory Perception Criterion. - Abhijit Karmakar; Arun Kumar 007; R. K. Patney (EURASIP J. Adv. Signal Process., 2011)

A perceptually motivated stationary wavelet packet filter-bank utilizing improved spectral over-subtraction algorithm for enhancing speech in non-stationary environments. - Navneet Upadhyay; Abhijit Karmakar (IHCI, 2012)

An auditory perception based improved multi-band spectral subtraction algorithm for enhancement of speech degraded by non-stationary noises. - Navneet Upadhyay; Abhijit Karmakar (IHCI, 2012)

The spectral subtractive-type algorithms for enhancing speech in noisy environments. - Navneet Upadhyay; Abhijit Karmakar (RAIT, 2012)

A perceptually motivated stationary wavelet packet filterbank using improved spectral over-subtraction for enhancement of speech in various noise environments. - Navneet Upadhyay; Abhijit Karmakar (Int. J. Speech Technol., 2014)

A Lifting Instruction for Performing DWT in LEON3 Processor Based System-on-Chip. - Rajul Bansal; Mahendra Kumar Jatav; Abhijit Karmakar (VDAT, 2017)

An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation. - Jai Gopal Pandey; Tarun Goel; Abhijit Karmakar (VDAT, 2017)

Efficient integration of coprocessor in LEON3 processor pipeline for System-on-Chip design. - Rajul Bansal; Abhijit Karmakar (Microprocess. Microsystems, 2017)

2D-3D CNN Based Architectures for Spectral Reconstruction From RGB Images. - Sriharsha Koundinya; Himanshu Sharma; Manoj Sharma; Avinash Upadhyay; Raunak Manekar; Rudrabha Mukhopadhyay; Abhijit Karmakar; Santanu Chaudhury (CVPR Workshops, 2018)

A High-Performance VLSI Architecture of the Present Cipher and its Implementations for SoCs. - Jai Gopal Pandey; Tarun Goel; Mausam Nayak; Chhavi Mitharwal; Abhijit Karmakar; Raj Singh (SoCC, 2018)

A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations. - Jai Gopal Pandey; Tarun Goel; Mausam Nayak; Chhavi Mitharwal; Sajid Khan 001; Santosh Kumar Vishvakarma; Abhijit Karmakar; Raj Singh (VDAT, 2018)

A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight Cipher. - Jai Gopal Pandey; Tarun Goel; Abhijit Karmakar (VLSID, 2018)

Homotopy optimisation based NMF for audio source separation. - Sriharsha Koundinya; Abhijit Karmakar (IET Signal Process., 2018)

An RNS Implementation of the Elliptic Curve Cryptography for IoT Security. - Jai Gopal Pandey; Chhavi Mitharwal; Abhijit Karmakar (TPS-ISA, 2019)

Efficient Closely-Coupled Integration of AES Coprocessor with LEON3 Processor. - Rajul Bansal; Abhijit Karmakar (VDAT, 2019)

Hardware architectures for PRESENT block cipher and their FPGA implementations. - Jai Gopal Pandey; Tarun Goel; Abhijit Karmakar (IET Circuits Devices Syst., 2019)

A Unified Architecture for AES/PRESENT Ciphers and its Usage in an SoC Environment. - Jai Gopal Pandey; Sanskriti Gupta; Abhijit Karmakar (LASCAS, 2020)

Closely-Coupled Lifting Hardware for Efficient DWT Computation in an SoC. - Rajul Bansal; Abhijit Karmakar (J. Signal Process. Syst., 2020)

Edge-based real-time face logging system for security applications. - Bipin Gaikwad; PVBSS Prakash; Abhijit Karmakar (ICCCNT, 2021)

Smart surveillance system for real-time multi-person multi-camera tracking at the edge. - Bipin Gaikwad; Abhijit Karmakar (J. Real Time Image Process., 2021)

Online Speech Enhancement by Retraining of LSTM Using SURE Loss and Policy Iteration. - Sriharsha Koundinya; Abhijit Karmakar (Neural Process. Lett., 2021)

End-to-end person re-identification: Real-time video surveillance over edge-cloud environment. - Bipin Gaikwad; Abhijit Karmakar (Comput. Electr. Eng., 2022)

An RTL Implementation of the Data Encryption Standard (DES). - Ruby Kumari; Jai Gopal Pandey; Abhijit Karmakar (CoRR, 2023)

Real-time distributed video analytics for privacy-aware person search. - Bipin Gaikwad; Abhijit Karmakar (Comput. Vis. Image Underst., 2023)

Efficient Hardware Implementation of Modular Multiplier over GF (2m) on FPGA. - Ruby Kumari; Gaurav Purohit; Abhijit Karmakar (CoRR, 2025)

An Efficient Hardware Implementation of Elliptic Curve Point Multiplication over GF(2m) on FPGA. - Ruby Kumari; Tapas Rout; Babul Saini; Jai Gopal Pandey; Abhijit Karmakar (CoRR, 2025)