Performance comparison of channel engineered deep sub-micrometer pseudo SOI n-MOSFETs. - Partha Sarkar; Abhijit Mallik; Chandan Kumar Sarkar (Microelectron. Reliab., 2007)

A threshold voltage model for short-channel MOSFETs taking into account the varying depth of channel depletion layers around the source and drain. - Srimanta Baishya; Abhijit Mallik; Chandan Kumar Sarkar (Microelectron. Reliab., 2008)

Study on the performance of sub 100 nm LACLATI MOSFETs for digital application. - Partha Sarkar; Abhijit Mallik; Chandan Kumar Sarkar (Microelectron. Reliab., 2009)

Subthreshold performance of pocket-implanted silicon-on-insulator CMOS devices and circuits for ultra-low-power analogue/mixed-signal applications. - Saurav Chakraborty; Abhijit Mallik; Chandan Kumar Sarkar (IET Circuits Devices Syst., 2011)