A Novel Dynamic Threshold Operation Using Electrically Induced Junction MOSFET in the Deep Sub-micrometer CMOS Regime. - Abhisek Dixit; V. Ramgopal Rao (VLSI Design, 2003)

Measurement and Analysis of Parasitic Capacitance in FinFETs with High-k Dielectrics and Metal-Gate Stack. - Abhisek Dixit; Anirban Bandhyopadhyay; Nadine Collaert; Kristin De Meyer; Malgorzata Jurczak (VLSI Design, 2009)

Large Signal RF Reliability of 45-nm RFSOI Power Amplifier Cell for Wi-Fi6 Applications. - Aarti Rathi; P. Srinivasan 002; Fernando Guarin; Abhisek Dixit (IRPS, 2021)

Deep Cryogenic Temperature TDDB in 45-nm PDSOI N-channel FETs for Quantum Computing Applications. - Asifa Amin; Aarti Rathi; Sujit K. Singh; Abhisek Dixit; Oscar Huerta-Gonzalez; P. Srinivasan 002; Fernando Guarin (IRPS, 2022)

RF Reliability of CMOS-Based Power Amplifier Cell for 5G mmWave Applications. - Aarti Rathi; Abhisek Dixit; P. Srinivasan 002; Oscar Huerta-Gonzalez; Fernando Guarin (IRPS, 2022)

Reliability of SPST Series-stacked SOI CMOS RF Switches for mmWave Applications. - Aarti Rathi; Abhisek Dixit; Naga Satish; P. Srinivasan 002; Fernando Guarin (IRPS, 2023)

Investigation on Positive Bias-Induced Threshold Voltage Instability in GaN-on-Si D-mode Power MIS-HEMTs. - Shivendra K. Rathaur; Abhisek Dixit; Edward Yi Chang (DRC, 2024)

Impact of Hot-Carrier Degradation on Flicker Noise (1/f) in 45-nm PD-SOI Floating-Body NFETs. - Shruti Pathak; Aarti Rathi; Abhisek Dixit; P. Srinivasan 002; Oscar H. Gonzalez (IRPS, 2025)