Statistical static timing analysis considering leakage variability in power gated designs. - Michael J. Anderson; Azadeh Davoodi; Jungseob Lee; Abhishek A. Sinkar; Nam Sung Kim (ISLPED, 2009)

Frequency and yield optimization using power gates in power-constrained designs. - Nam Sung Kim; Jun Seomun; Abhishek A. Sinkar; Jungseob Lee; Tae Hee Han; Ken Choi; Youngsoo Shin (ISLPED, 2009)

Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors. - Abhishek A. Sinkar; Nam Sung Kim (ISLPED, 2009)

WOR-BIST: A Complete Test Solution for Designs Meeting Power, Area and Performance Requirements. - Chunhua Yao; Kewal K. Saluja; Abhishek A. Sinkar (VLSI Design, 2009)

False Path Aware Timing Yield Estimation under Variability. - Lin Xie; Azadeh Davoodi; Kewal K. Saluja; Abhishek A. Sinkar (VTS, 2009)

Analyzing and minimizing effects of temperature variation and NBTI on active leakage power of power-gated circuits. - Abhishek A. Sinkar; Nam Sung Kim (ISQED, 2010)

Combating Aging with the Colt Duty Cycle Equalizer. - Erika Gunadi; Abhishek A. Sinkar; Nam Sung Kim; Mikko H. Lipasti (MICRO, 2010)

AVS-aware power-gate sizing for maximum performance and power efficiency of power-constrained processors. - Abhishek A. Sinkar; Nam Sung Kim (ASP-DAC, 2011)

Cost-effective power delivery to support per-core voltage domains for power-constrained processors. - Hamid Reza Ghasemi; Abhishek A. Sinkar; Michael J. Schulte; Nam Sung Kim (DAC, 2012)

Workload-aware voltage regulator optimization for power efficient multi-core processors. - Abhishek A. Sinkar; Hao Wang 011; Nam Sung Kim (DATE, 2012)

Maximizing Frequency and Yield of Power-Constrained Designs Using Programmable Power-Gating. - Nam Sung Kim; Abhishek A. Sinkar; Jun Seomun; Youngsoo Shin (IEEE Trans. Very Large Scale Integr. Syst., 2012)

EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing. - Ulya R. Karpuzcu; Abhishek A. Sinkar; Nam Sung Kim; Josep Torrellas (HPCA, 2013)

Improving platform energy: chip area trade-off in near-threshold computing environment. - Hao Wang 011; Abhishek A. Sinkar; Nam Sung Kim (ICCAD, 2013)

Clamping Virtual Supply Voltage of Power-Gated Circuits for Active Leakage Reduction and Gate-Oxide Reliability. - Abhishek A. Sinkar; Taejoon Park; Nam Sung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Quantitative comparison of the power reduction techniques for samsung reconfigurable processor. - Hoyoung Kim; Soojung Ryu; Abhishek A. Sinkar; Nam Sung Kim (ISCAS, 2014)

Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores. - Abhishek A. Sinkar; Hao Wang 011; Nam Sung Kim (ISQED, 2014)

Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors. - Abhishek A. Sinkar; Hamid Reza Ghasemi; Michael J. Schulte; Ulya R. Karpuzcu; Nam Sung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2014)

VR-scale: runtime dynamic phase scaling of processor voltage regulators for improving power efficiency. - Hadi Asghari Moghaddam; Hamid Reza Ghasemi; Abhishek Arvind Sinkar; Indrani Paul; Nam Sung Kim (DAC, 2016)