A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design. - Vishal Sharma 004; Pranshu Bisht; Abhishek Dalal; Shailesh Singh Chouhan; H. S. Jattana; Santosh Kumar Vishvakarma (VDAT, 2018)