A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steven Decker; Abhishek Kamath; Paul Wilkins (ISSCC, 2009)

A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steven Decker; Abhishek Kamath; Paul Wilkins (IEEE J. Solid State Circuits, 2009)

An introductory lab course in Digital Design: On-line and on-site laboratory solution. - Saurabh Agrawal; Debapratim Ghosh; Abhishek Kamath; Kaushlesh Sharma; Sneha Mistry; Madhumita Date; Sachin Patkar; Dinesh Sharma (EDUCON, 2013)

A 28 nm analog and audio mixed-signal front end for 4G/LTE Cellular System-on-Chip. - Xicheng Jiang; Xinyu Yu; Fang Lin; Felix Cheung; Mike Inerfield; Kevin Li; Abhishek Kamath; Harsh Mehta; Jingbo Duan; Jing Yang; Gautham Krishnamurthy; Sumant Ranganathan; et al. (ESSCIRC, 2014)

An 11.5-ENOB 100-MS/s 8mW dual-reference SAR ADC in 28nm CMOS. - Michael A. Inerfield; Abhishek Kamath; Feng Su; Jason Hu; Xinyu Yu; Victor Fong; Omar Alnaggar; Fang Lin; Tom Kwan (VLSIC, 2014)