Re-using BIST for circuit aging monitoring. - Farshad Firouzi; Fangming Ye; Arunkumar Vijayan; Abhishek Koneru; Krishnendu Chakrabarty; Mehdi Baradaran Tahoori (ETS, 2015)

Fine-Grained Aging Prediction Based on the Monitoring of Run-Time Stress Using DfT Infrastructure. - Abhishek Koneru; Arunkumar Vijayan; Krishnendu Chakrabarty; Mehdi Baradaran Tahoori (ICCAD, 2015)

Self-awareness and self-learning for resiliency in real-time systems. - Mehdi Baradaran Tahoori; Abhijit Chatterjee; Krishnendu Chakrabarty; Abhishek Koneru; Arunkumar Vijayan; Debashis Banerjee (IOLTS, 2015)

Accurate Analysis and Prediction of Enterprise Service-Level Performance. - Qing Duan; Abhishek Koneru; Jun Zeng 001; Krishnendu Chakrabarty; Gary Dispoto (ACM Trans. Design Autom. Electr. Syst., 2015)

Analysis of electrostatic coupling in monolithic 3D integrated circuits and its impact on delay testing. - Abhishek Koneru; Krishnendu Chakrabarty (ETS, 2016)

Online soft-error vulnerability estimation for memory arrays. - Arunkumar Vijayan; Abhishek Koneru; Mojtaba Ebrahimi; Krishnendu Chakrabarty; Mehdi Baradaran Tahoori (VTS, 2016)

Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions: (Invited paper). - Kyungwook Chang; Abhishek Koneru; Krishnendu Chakrabarty; Sung Kyu Lim (ICCAD, 2017)

A Design-for-Test Solution for Monolithic 3D Integrated Circuits. - Abhishek Koneru; Sukeshwar Kannan; Krishnendu Chakrabarty (ICCD, 2017)

Impact of Electrostatic Coupling and Wafer-Bonding Defects on Delay Testing of Monolithic 3D Integrated Circuits. - Abhishek Koneru; Sukeshwar Kannan; Krishnendu Chakrabarty (ACM J. Emerg. Technol. Comput. Syst., 2017)

Power-Supply Noise Analysis for Monolithic 3D ICs Using Electrical and Thermal Co-Simulation. - Abhishek Koneru; Aida Todri-Sanial; Krishnendu Chakrabarty (ICECS, 2018)

An inter-layer interconnect BIST solution for monolithic 3D ICs. - Abhishek Koneru; Krishnendu Chakrabarty (VTS, 2018)

Fine-Grained Aging-Induced Delay Prediction Based on the Monitoring of Run-Time Stress. - Arunkumar Vijayan; Abhishek Koneru; Saman Kiamehr; Krishnendu Chakrabarty; Mehdi Baradaran Tahoori (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Test and Design-for-Testability Solutions for Monolithic 3D Integrated Circuits. - Abhishek Koneru; Krishnendu Chakrabarty (ACM Great Lakes Symposium on VLSI, 2019)

Reliable Power Delivery and Analysis of Power-Supply Noise During Testing in Monolithic 3D ICs. - Abhishek Koneru; Aida Todri-Sanial; Krishnendu Chakrabarty (VTS, 2019)

A Design-for-Test Solution Based on Dedicated Test Layers and Test Scheduling for Monolithic 3-D Integrated Circuits. - Abhishek Koneru; Sukeshwar Kannan; Krishnendu Chakrabarty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

An Interlayer Interconnect BIST and Diagnosis Solution for Monolithic 3-D ICs. - Abhishek Koneru; Krishnendu Chakrabarty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Disruptive Changes in Field Equation Modeling: A Simple Interface for Wafer Scale Engines. - Mino Woo; Terry Jordan; Robert Schreiber; Ilya Sharapov; Shaheer Muhammad; Abhishek Koneru; Michael James 002; Dirk Van Essendelft (CoRR, 2022)