Determination of energy and spatial distribution of oxide border traps in In0.53Ga0.47As MOS capacitors from capacitance-voltage characteristics measured at various temperatures. - Chunmeng Dou; Dennis Lin; Abhitosh Vais; Tsvetan Ivanov; Han-Ping Chen; Koen Martens; Kuniyuki Kakushima; Hiroshi Iwai; Yuan Taur; Aaron Thean; Guido Groeseneken (Microelectron. Reliab., 2014)

The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices. - Abhitosh Vais; Koen Martens; Jacopo Franco; Dennis Lin; AliReza Alian; Philippe Roussel; S. Sioncke; Nadine Collaert; Aaron Thean; Marc M. Heyns; Guido Groeseneken; Kristin De Meyer (IRPS, 2015)

Beyond-Si materials and devices for more Moore and more than Moore applications. - Nadine Collaert; AliReza Alian; Hiroaki Arimura; Geert Boccardi; Geert Eneman; Jacopo Franco; Tsvetan Ivanov; Dennis Lin; Jérôme Mitard; S. Ramesh; R. Rooyackers; Marc Schaekers; et al. (ICICDT, 2016)

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps. - Vamsi Putcha; Jacopo Franco; Abhitosh Vais; Ben Kaczer; S. Sioncke; Dimitri Linten; Guido Groeseneken (IRPS, 2018)

A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologies. - Abhitosh Vais; Brent Hsu; Olga Syshchyk; Hao Yu; AliReza Alian; Yves Mols; Komal Vondkar Kodandarama; Bernardette Kunert; Niamh Waldron; Eddy Simoen; Nadine Collaert (IRPS, 2021)

III-V HBTs on 300 mm Si substrates using merged nano-ridges and its application in the study of impact of defects on DC and RF performance. - Abhitosh Vais; Sachin Yadav 001; Yves Mols; Bjorn Vermeersch; Komal Vondkar Kodandarama; Marina Baryshnikova; G. Mannaert; R. Alcotte; Geert Boccardi; Piet Wambacq; Bertrand Parvais; R. Langer; et al. (ESSDERC, 2022)