Delay and area efficient approximate multiplier using reverse carry propagate full adder. - V. J. Arulkarthick; Abinaya Rathinaswamy (Microprocess. Microsystems, 2020)

Design of BCD adder with five input majority gate for QCA. - V. J. Arulkarthick; Abinaya Rathinaswamy; Kannan Srihari (Microprocess. Microsystems, 2020)