4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance. - Hugh Mair; Gordon Gammie; Alice Wang; Rolf Lagerquist; C. J. Chung; Sumanth Gururajarao; Ping Kao; Anand Rajagopalan; Anirban Saha; Amit Jain; Ericbill Wang; Shichin Ouyang; et al. (ISSCC, 2016)

3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. - Hugh Mair; Ericbill Wang; Alice Wang; Ping Kao; Yuwen Tsai; Sumanth Gururajarao; Rolf Lagerquist; Jin Son; Gordon Gammie; Gordon Lin; Achuta Thippana; Kent Li; et al. (ISSCC, 2017)

2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoC. - Hugh Mair; Ericbill Wang; Ashish Nayak; Rolf Lagerquist; Loda Chou; Gordon Gammie; HsinChen Chen; Lee-Kee Yong; Manzur Rahman; Jenny Wiedemeier; Ramu Madhavaram; Alex Chiou; et al. (ISSCC, 2020)

A 7nm 5G Mobile SoC Featuring a 3.0GHz Tri-Gear Application Processor Subsystem. - HsinChen Chen; Rolf Lagerquist; Ashish Nayak; Hugh Mair; Gokulakrishnan Manoharan; Ericbill Wang; Gordon Gammie; Efron Ho; Anand Rajagopalan; Lee-Kee Yong; Ramu Madhavaram; Madhur Jagota; et al. (ISSCC, 2021)

A 5nm 3.4GHz Tri-Gear ARMv9 CPU Subsystem in a Fully Integrated 5G Flagship Mobile SoC. - Ashish Nayak; HsinChen Chen; Hugh Mair; Rolf Lagerquist; Tao Chen; Anand Rajagopalan; Gordon Gammie; Ramu Madhavaram; Madhur Jagota; C. J. Chung; Jenny Wiedemeier; Bala Meera; et al. (ISSCC, 2022)

2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC. - Anshul Varma; Sumanth Gururajarao; HsinChen Chen; Tao Chen; Gordon Gammie; Hugh Mair; Jen-Hang Yang; Hao-Hsiang Yu; Shun-Chieh Chang; Cheng-Hao Yang; Li-An Huang; Kumar Ramanathan; et al. (ISSCC, 2024)