Hardware interface design for real time embedded systems. - Adel Baganne; Jean Luc Philippe; Eric Martin 001 (Great Lakes Symposium on VLSI, 1997)

Low Power Design of an Acoustic Echo Canceller Gmdf a Algorithm on Dedicated VLSI Architectures. - S. Gailhard; Nathalie Julien; Adel Baganne; Eric Martin 001 (Great Lakes Symposium on VLSI, 1999)

A Co-Design Methodology for Telecommunication Systems: A Case Study of an Acoustic Echo Canceller. - Adel Baganne; Jean Luc Philippe; Eric Martin 001 (J. VLSI Signal Process., 1999)

A design methodology for integrating IP into SOC systems. - Philippe Coussy; Adel Baganne; Eric Martin 001 (CICC, 2002)

IP cores integration in DSP System-on-chip designs. - Philippe Coussy; Adel Baganne; Eric Martin 001 (EUSIPCO, 2002)

Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder. - Philippe Coussy; Adel Baganne; Eric Martin 001 (ICECS, 2002)

A design methodology for IP integration. - Philippe Coussy; Adel Baganne; Eric Martin 001 (ISCAS (4), 2002)

A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration. - Adel Baganne; Imed Bennour; Mehrez Elmarzougui; Riadh Gaiech; Eric Martin 001 (DATE, 2003)

A simulation based approach for incorporating virtual components IP cores into multimedia systems design. - Adel Baganne; Imed Bennour; Mehrez Elmarzougui; Eric Martin 001 (ICASSP (2), 2003)

Communication and Timing Constraints Analysis for IP Design and Integration. - Philippe Coussy; Adel Baganne; Eric Martin 001 (VLSI-SOC, 2003)

A methodology for IP integration into DSP SoC: a case study of a MAP algorithm for turbo decoder. - Philippe Coussy; David Gnaedig; Amor Nafkha; Adel Baganne; Emmanuel Boutillon; Eric Martin 001 (ICASSP (5), 2004)

Co-simulation and communication synthesis approach for intellectual properties based SoCs. - Mehrez Marzougui; Mohamed Abid; Adel Baganne; Rached Tourki (Comput. Electr. Eng., 2004)

A formal method for hardware IP design and integration under I/O and timing constraints. - Philippe Coussy; Emmanuel Casseau; Pierre Bomel; Adel Baganne; Eric Martin 001 (ACM Trans. Embed. Comput. Syst., 2006)

A Reconfigurable Implementation of the New Secure Hash Algorithm. - Zeghid Medien; Belgacem Bouallegue; Adel Baganne; Mohsen Machhout; Rached Tourki (ARES, 2007)

MIC@R : A Generic Low Latency Router for On-Chip Networks. - Rafik Ben-Tekaya; Adel Baganne; Rached Tourki (ICECS, 2007)

Constrained algorithmic IP design for system-on-chip. - Philippe Coussy; Emmanuel Casseau; Pierre Bomel; Adel Baganne; Eric Martin 001 (Integr., 2007)

Nouvelles architectures génériques de NoC. - Mounir Zid; Abdelkrim Zitouni; Adel Baganne; Rached Tourki (Tech. Sci. Informatiques, 2009)

Performance evaluation of MIC@R NoC for real-time applications. - Rafik Ben-Tekaya; Adel Baganne; Kholdoun Torki; Rached Tourki (Int. J. Comput. Aided Eng. Technol., 2010)

Design and Hardware Implementation of QoSS - AES Processor for Multimedia applications. - Zeghid Medien; Mohsen Machhout; Belgacem Bouallegue; Lazhar Khriji; Adel Baganne; Rached Tourki (Trans. Data Priv., 2010)

Monitoring transaction level SystemC models using a generic and aspect-oriented framework. - Meriam Kallel; Younes Lahbib; Adel Baganne; Rached Tourki (Int. J. Comput. Aided Eng. Technol., 2012)

A new approach for encryption system based on block cipher algorithms and logistic function. - Fatma Sbiaa; Adel Baganne; Zeghid Medien; Rached Tourki (SSD, 2015)

Efficient Hybrid Encryption System Based on Block Cipher and Chaos Generator. - Sonia Kotel; Fatma Sbiaa; Zeghid Medien; Mohsen Machhout; Adel Baganne; Rached Tourki (CIT, 2016)

A Selective Encryption Scheme with Multiple Security Levels for the H.264/AVC Video Coding Standard. - Fatma Sbiaa; Sonia Kotel; Zeghid Medien; Rached Tourki; Mohsen Machhout; Adel Baganne (CIT, 2016)

Performance evaluation and design considerations of lightweight block cipher for low-cost embedded devices. - Sonia Kotel; Fatma Sbiaa; Zeghid Medien; Mohsen Machhout; Adel Baganne; Rached Tourki (AICCSA, 2016)

High-Level Implementation of a Chaotic and AES Based Crypto-System. - Fatma Sbiaa; Sonia Kotel; Zeghid Medien; Rached Tourki; Mohsen Machhout; Adel Baganne (J. Circuits Syst. Comput., 2017)

Low latency multicasting architecture implemented using new network topology. - Med fehmi Chatmen; Adel Baganne; Rached Tourki (Microprocess. Microsystems, 2019)