Functional fault model definition for bus testing. - Elmira Karimi; Mohammad Hashem Haghbayan; Adele Maleki; Mahmoud Tabandeh (EWDTS, 2013)

Graph based fault model definition for bus testing. - Elmira Karimi; Mohammad Hashem Haghbayan; Adele Maleki; Mahmoud Tabandeh (VLSI-SoC, 2013)

SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems. - Maher Fakih; Alina Lenz; Mikel Azkarate-askasua; Javier Coronel; Alfons Crespo; Simon Davidmann; Juan Carlos Diaz Garcia; Nera González Romero; Kim Grüttner; Sören Schreiner; Razi Seyyedi; Roman Obermaisser; et al. (Microprocess. Microsystems, 2017)

Fault-Tolerant and Energy-Efficient Communication in Mixed-Criticality Networks-on-Chips. - Adele Maleki; Hamidreza Ahmadian; Roman Obermaisser (NORCAS, 2018)

Fault Detection and Localization for Network-on-Chips in Mixed-Criticality Systems. - Adele Maleki; Hamidreza Ahmadian; Roman Obermaisser (MCSoC, 2019)