Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle. - Trio Adiono; Adiwena Putra; Nana Sutisna; Infall Syafalni; Rahmat Mulyawan (IEEE Access, 2021)

Strix: An End-to-End Streaming Architecture with Two-Level Ciphertext Batching for Fully Homomorphic Encryption with Programmable Bootstrapping. - Adiwena Putra; Prasetiyo; Yi Chen; John Kim 001; Joo-Young Kim 001 (MICRO, 2023)

Morphling: A Throughput-Maximized TFHE-based Accelerator using Transform-domain Reuse. - Prasetiyo; Adiwena Putra; Joo-Young Kim 001 (HPCA, 2024)

ABC-FHE: A Resource-Efficient Accelerator Enabling Bootstrappable Parameters for Client-Side Fully Homomorphic Encryption. - Sungwoong Yune; Hyojeong Lee; Adiwena Putra; Hyunjun Cho; Cuong Duong Manh; Jaeho Jeon; Joo-Young Kim 001 (DAC, 2025)

EXION: Exploiting Inter-and Intra-Iteration Output Sparsity for Diffusion Models. - Jaehoon Heo; Adiwena Putra; Jieon Yoon; Sungwoong Yune; Hangyeol Lee; Ji-Hoon Kim 004; Joo-Young Kim 001 (HPCA, 2025)

23.10 HuMoniX: A 57.3fps 12.8TFLOPS/W Text-to-Motion Processor with Inter-Iteration Output Sparsity and Inter-Frame Joint Similarity. - Jaehoon Heo; Adiwena Putra; Sungwoong Yune; Jieon Yoon; Hangyeol Lee; Jihoon Kim; Joo-Young Kim 001 (ISSCC, 2025)