Chaos from switched-capacitor circuits: Discrete maps. - Ángel Rodríguez-Vázquez; José L. Huertas; Adoración Rueda; Belén Pérez-Verdú; Leon O. Chua (Proc. IEEE, 1987)

On-line testing of switched-capacitor filters. - José Luis Huertas; Diego Vázquez; Adoración Rueda (VTS, 1992)

Testability in analogue cellular neural networks. - Adoración Rueda; José L. Huertas (Int. J. Circuit Theory Appl., 1992)

Improving the testability of switched-capacitor filters. - José Luis Huertas; Adoración Rueda; Diego Vázquez (J. Electron. Test., 1993)

Testable switched-capacitor filters. - José L. Huertas; Adoración Rueda; Diego Vázquez (IEEE J. Solid State Circuits, 1993)

An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. - Juan A. Prieto; José M. Quintana; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A Low-Cost Strategy for Testing Analog Filters. - Diego Vázquez; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors. - Alberto Yufera; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A new strategy for testing analog filters. - Diego Vázquez; Adoración Rueda; José Luis Huertas (VTS, 1994)

Programmable switched-current wave analog filters. - Alberto Yúfera; Adoración Rueda; José L. Huertas (IEEE J. Solid State Circuits, 1994)

Statistical behavioral modeling and characterization of A/D converters. - Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (ICCAD, 1995)

A solution for the on-line test of analog ladder filters. - Diego Vázquez; Adoración Rueda; José L. Huertas (VTS, 1995)

Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. - Diego Vázquez; José L. Huertas; Adoración Rueda (VTS, 1996)

SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. - Salvador Mir; Adoración Rueda; Thomas Olbrich; Eduardo J. Peralías; José Luis Huertas (DAC, 1997)

A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. - Juan A. Prieto; Adoración Rueda; José M. Quintana; José Luis Huertas (ED&TC, 1997)

Analog and Mixed-Signal Benchmark Circuits-First Release. - Bozena Kaminska; Karim Arabi; I. Bell; José L. Huertas; Bruce C. Kim; Adoración Rueda; Mani Soma; Prashant Goteti (ITC, 1997)

A DFT Technique for Analog-to-Digital Converters with digital correction. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (VTS, 1997)

Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. - Salvador Mir; Adoración Rueda; Diego Vázquez; José Luis Huertas (DATE, 1998)

An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. - Juan A. Prieto; Adoración Rueda; Ian Andrew Grout; Eduardo J. Peralías; José L. Huertas; Andrew Mark David Richardson (DATE, 1998)

CMOS pipelined A/D converters with concurrent error detection capability. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (ICECS, 1998)

DfT and on-line test of high-performance data converters: a practical case. - Eduardo J. Peralías; Adoración Rueda; Juan A. Prieto; José L. Huertas (ITC, 1998)

A high-Q bandpass fully differential SC filter with enhanced testability. - Diego Vázquez; Adoración Rueda; José Luis Huertas; Eduardo J. Peralías (IEEE J. Solid State Circuits, 1998)

vMOS-based sorters for multiplier implementations. - Esther Rodríguez-Villegas; Maria J. Avedillo; José M. Quintana; Gloria Huertas; Adoración Rueda (ISCAS (1), 1999)

Programmable low-voltage continuous-time filter for audio applications. - Alberto Yufera; Adoración Rueda (ISCAS (2), 1999)

Effective oscillation-based test for application to a DTMF filter bank. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (ITC, 1999)

A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. - Eduardo J. Peralías; Antonio J. Acosta 001; Adoración Rueda; José L. Huertas (DATE, 2000)

VHDL-based behavioural description of pipeline ADCs. - Eduardo J. Peralías; Antonio J. Acosta 001; Adoración Rueda; José L. Huertas (ISCAS, 2000)

A low-voltage √x floating-gate MOS integrator. - Esther O. Rodríguez; Alberto Yufera; Adoración Rueda (ISCAS, 2000)

A gm-C floating-gate MOS integrator. - Esther O. Rodríguez; Alberto Yufera; Adoración Rueda (ISCAS, 2000)

Alternative DFT Strategies for High-Speed Pipelined Data Converters. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (LATW, 2000)

An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits. - Raúl Jiménez; Antonio J. Acosta 001; Eduardo J. Peralías; Adoración Rueda (PATMOS, 2000)

Efficient νMOS Realization of Threshold Voters for Self-Purging Redundancy. - José M. Quintana; Maria J. Avedillo; Esther Rodríguez-Villegas; Adoración Rueda (SBCCI, 2000)

Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (VLSI Design, 2000)

νMOS-based Sorter for Arithmetic Applications. - Esther Rodríguez-Villegas; Maria J. Avedillo; José M. Quintana; Gloria Huertas; Adoración Rueda (VLSI Design, 2000)

Analog/mixed-signal IP modeling for design reuse. - Natividad Martínez Madrid; Eduardo J. Peralías; Antonio J. Acosta 001; Adoración Rueda (DATE, 2001)

Design of a CMOS fully differential switched-opamp for SC circuits at very low power supply voltages. - Jesús Arias Álvarez; Luis Quintanilla; Lourdes Enríquez; José Vicente; Juan Barbolla; Diego Vázquez; Adoración Rueda (ICECS, 2001)

A 1.5 V 23 MHz low power FGMOS filter. - Esther Rodríguez-Villegas; Adoración Rueda; Alberto Yúfera (ICECS, 2001)

Structural testing of pipelined analog to digital converters. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (ISCAS (1), 2001)

A 1.25 V FGMOS filter using translinear circuits. - Esther Rodríguez-Villegas; Adoración Rueda; Alberto Yufera (ISCAS (1), 2001)

Self-Testable Pipelined ADC with Low Hardware Overhead. - Eduardo J. Peralías; Gloria Huertas; Adoración Rueda; José L. Huertas (VTS, 2001)

New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. - Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (J. Electron. Test., 2001)

A Low-Voltage Floating-Gate MOS Biquad. - Esther Rodríguez-Villegas; Alberto Yufera; Adoración Rueda (VLSI Design, 2001)

A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda; Ralf Seepold; Natividad Martínez Madrid (DATE, 2002)

Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (DELTA, 2002)

Threshold-logic-based design of compressors. - José M. Quintana; Maria J. Avedillo; Esther Rodríguez-Villegas; Adoración Rueda (ICECS, 2002)

Design of a switched opamp-based bandpass filter in a 0.35 μm CMOS technology. - Luis Quintanilla; Jesús Arias Álvarez; Lourdes Enríquez; José Vicente; Juan Barbolla; Diego Vázquez; Adoración Rueda (ICECS, 2002)

High-speed low-power logic gates using floating gates. - Esther Rodríguez-Villegas; José M. Quintana; Maria J. Avedillo; Adoración Rueda (ISCAS (5), 2002)

A micropower log domain FGMOS filter. - Esther Rodríguez-Villegas; Adoración Rueda; Alberto Yufera (ISCAS (3), 2002)

Practical solutions for the application of the oscillation-based-test in analog integrated circuits. - Diego Vázquez; Gloria Huertas; Gildas Léger; Adoración Rueda; José L. Huertas (ISCAS (1), 2002)

Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits. - Diego Vázquez; Gloria Huertas; Adoración Rueda; Gildas Léger; José L. Huertas (LATW, 2002)

A Continuous-Time Incremental Analog to Digital Converter. - Ricardo Doldán; Alberto Yúfera; Adoración Rueda (SBCCI, 2002)

Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. - Diego Vázquez; Gloria Huertas; Gildas Léger; Adoración Rueda; José L. Huertas (VTS, 2002)

Practical Oscillation-Based Test of Integrated Filters. - Gloria Huertas; Diego Vázquez; Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (IEEE Des. Test Comput., 2002)

Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. - Gloria Huertas; Diego Vázquez; Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (IEEE Des. Test Comput., 2002)

Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (SBCCI, 2003)

A Charge Correction Cell for FGMOS-Based Circuits. - Esther Rodríguez-Villegas; Alberto Yufera; Adoración Rueda (SBCCI, 2003)

Oscillation-based test in bandpass oversampled A/D converters. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (Microelectron. J., 2003)

Digital Background Gain Error Correction in Pipeline ADCs. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (DATE, 2004)

A Digital Test for First-Order [Sigma-Delta] Modulators. - Gildas Léger; Adoración Rueda (DATE, 2004)

A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. - Diego Vázquez; Gildas Léger; Gloria Huertas; Adoración Rueda; José L. Huertas (DATE, 2004)

A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion. - Esther Rodríguez-Villegas; Alberto Yúfera; Adoración Rueda (IEEE J. Solid State Circuits, 2004)

A 1-V micropower log-domain integrator based on FGMOS transistors operating in weak inversion. - Esther Rodríguez-Villegas; Alberto Yúfera; Adoración Rueda (IEEE J. Solid State Circuits, 2004)

Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. - Gildas Léger; Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Full calibration digital techniques for pipeline ADCs. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ISCAS (3), 2005)

Guest Editorial. - Adoración Rueda; Michel Renovell; José Luis Huertas (J. Electron. Test., 2005)

Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. - Diego Vázquez; Gloria Huertas; África Luque; Manuel J. Barragan Asian; Gildas Léger; Adoración Rueda; José Luis Huertas (J. Electron. Test., 2005)

A tissue impedance measurement chip for myocardial ischemia detection. - Alberto Yufera; Adoración Rueda; José Maria Muñoz; Ricardo Doldán; Gildas Léger; Esther Rodríguez-Villegas (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology. - Manuel J. Barragan Asian; Diego Vázquez; Adoración Rueda (DDECS, 2006)

Experimental Validation of a Fully Digital BISTfor Cascaded Sigma Delta Modulators. - Gildas Léger; Adoración Rueda (ETS, 2006)

Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ISCAS, 2006)

Improved Background Algorithms for Pipeline ADC Full Calibration. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ISCAS, 2007)

Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (SBCCI, 2007)

A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications. - Antonio Jose Ginés; Ricardo Doldán; Alberto Villegas; Antonio J. Acosta 001; Maria Angeles Jalón; Diego Vázquez; Adoración Rueda; Eduardo J. Peralías (APCCAS, 2008)

A 5GHz wide tuning range LC-VCO in sub-micrometer CMOS technology. - Ricardo Doldán Lorenzo; Antonio Jose Ginés Arteaga; Adoración Rueda; Eduardo J. Peralías (APCCAS, 2008)

Practical Implementation of a Network Analyzer for Analog BIST Applications. - Manuel J. Barragan Asian; Diego Vázquez; Adoración Rueda (DATE, 2008)

A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. - Rafaella Fiorelli; Fernando Silveira; Eduardo J. Peralías; Diego Vázquez; Adoración Rueda; José Luis Huertas (SBCCI, 2008)

Simple Evaluation of the Nonlinearity Signature of an ADC Using a Spectral Approach. - Eduardo J. Peralías; Maria Angeles Jalón; Adoración Rueda (VLSI Design, 2008)

A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis. - Manuel J. Barragan Asian; Rafaella Fiorelli; Diego Vázquez; Adoración Rueda; José Luis Huertas (Asian Test Symposium, 2009)

A CMOS bio-impedance measurement system. - Alberto Yufera; Adoración Rueda (DDECS, 2009)

On-line estimation of the integral non-linear errors in analogue-to-digital converters without histogram evaluation. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ECCTD, 2009)

A survey on digital background calibration of ADCs. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ECCTD, 2009)

Design of A CMOS closed-loop system useful for bio-impedance measurements. - Alberto Yufera; Adoración Rueda (ICECS, 2009)

Low-Cost Digital Detection of Parametric Faults in Cascaded SigmaDelta Modulators. - Gildas Léger; Adoración Rueda (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A low power low voltage mixer for 2.4GHz applications in CMOS-90nm technology. - Alberto Villegas; Diego Vázquez; Adoración Rueda (DDECS, 2010)

(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. - Manuel J. Barragan Asian; Gloria Huertas; Adoración Rueda; José Luis Huertas (DELTA, 2010)

Low-cost signature test of RF blocks based on envelope response analysis. - Manuel J. Barragan Asian; Rafaella Fiorelli; Diego Vázquez; Adoración Rueda; José Luis Huertas (ETS, 2010)

Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit. - Antonio J. Ginés; Ricardo Doldán; Adoración Rueda; Eduardo J. Peralías (ICECS, 2010)

On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation. - Antonio J. Ginés; Ricardo Doldán; Manuel J. Barragan Asian; Adoración Rueda; Eduardo J. Peralías (ISCAS, 2010)

A BIST Solution for Frequency Domain Characterization of Analog Circuits. - Manuel J. Barragan Asian; Diego Vázquez; Adoración Rueda (J. Electron. Test., 2010)

Design of a CMOS closed-loop system with applications to bio-impedance measurements. - Alberto Yufera; Adoración Rueda (Microelectron. J., 2010)

On Chopper Effects in Discrete-Time SigmaDelta Modulators. - Gildas Léger; Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs. - Manuel J. Barragan Asian; Rafaella Fiorelli; Gildas Léger; Adoración Rueda; José L. Huertas (Asian Test Symposium, 2011)

2.4-GHz single-ended input low-power low-voltage active front-end for ZigBee applications in 90 nm CMOS. - Rafaella Fiorelli; Alberto Villegas; Eduardo J. Peralías; Diego Vázquez; Adoración Rueda (ECCTD, 2011)

A 3.6mW @ 1.2V high linear 8th-order CMOS complex filter for IEEE 802.15.4 standard. - Alberto Villegas; Diego Vázquez; Eduardo J. Peralías; Adoración Rueda (ESSCIRC, 2011)

Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures. - Manuel J. Barragan Asian; Rafaella Fiorelli; Gildas Léger; Adoración Rueda; José L. Huertas (J. Electron. Test., 2011)

Analog Sinewave Signal Generators for Mixed-Signal Built-in Test Applications. - Manuel J. Barragan Asian; Diego Vázquez; Adoración Rueda (J. Electron. Test., 2011)

Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (IEEE Trans. Instrum. Meas., 2011)

Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. - Antonio Jose Ginés; Alberto Villegas; Eduardo J. Peralías; Adoración Rueda (ICECS, 2012)

Analysis of steady-state common-mode response in differential LC-VCOs. - Ricardo Doldán; Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ISCAS, 2012)

Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique. - Manuel J. Barragán; Gildas Léger; Diego Vázquez; Adoración Rueda (LASCAS, 2013)

Inductor characterization in RF LC-VCOs. - Ricardo Doldán; Antonio J. Ginés; Adoración Rueda (LASCAS, 2013)

Analysis of process variations' impact on a 2.4 GHz 90 nm CMOS LNA. - Jorge Luis González Rios; Juan Carlos Cruz; Diego Vázquez; Adoración Rueda (LASCAS, 2013)

INL systematic reduced-test technique for Pipeline ADCs. - Eduardo J. Peralías; Antonio Jose Ginés; Adoración Rueda (ETS, 2014)

Closed-loop simulation method for evaluation of static offset in discrete-time comparators. - Antonio J. Ginés; Eduardo J. Peralías; Gildas Léger; Adoración Rueda (ICECS, 2014)

From voltage oscillations to tissue-impedance measurements. - Andrés Maldonado; Pablo Pérez; Gloria Huertas; Alberto Yufera; Adoración Rueda; José L. Huertas (BioCAS, 2015)

An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs. - Juan Núñez 002; Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (LASCAS, 2015)

The Bio-Oscillator: A Circuit for Cell-Culture Assays. - Gloria Huertas; Andrés Maldonado; Alberto Yufera; Adoración Rueda; José Luis Huertas (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Background Digital Calibration of Comparator Offsets in Pipeline ADCs. - Antonio Jose Ginés; Eduardo J. Peralías; Adoración Rueda (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator. - Antonio J. Ginés; Eduardo J. Peralías; Gildas Léger; Adoración Rueda; Guillaume Renaud; Manuel J. Barragán; Salvador Mir (ETS, 2016)

Cell-culture measurements using voltage oscillations. - Andrés Maldonado; Gloria Huertas; Adoración Rueda; José Luis Huertas; Pablo Pérez; Alberto Yufera (LASCAS, 2016)

On the limits of machine learning-based test: A calibrated mixed-signal system case study. - Manuel J. Barragán; Gildas Léger; Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (DATE, 2017)

Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs. - Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Redundant SAR ADCs with Split-capacitor DAC. - Antonio Lopez-Angulo; Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (ICECS, 2018)

Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach. - Antonio J. Ginés; Antonio Lopez-Angulo; Eduardo J. Peralías; Adoración Rueda (ISCAS, 2018)

Mismatch and Offset Calibration in Redundant SAR ADC. - Antonio Lopez-Angulo; Antonio J. Ginés; Eduardo J. Peralías; Adoración Rueda (DCIS, 2019)

Fast adaptive comparator offset calibration in pipeline ADC with self-repairing thermometer to binary encoder. - Antonio Jose Ginés; Eduardo José Peralías; Cristina Aledo; Adoración Rueda (Int. J. Circuit Theory Appl., 2019)