6.3 A Heterogeneous 3D-IC consisting of two 28nm FPGA die and 32 reconfigurable high-performance data converters. - Christophe Erdmann; Donnacha Lowney; Adrian Lynam; Aidan Keady; John McGrath; Edward Cullen; Daire Breathnach; Denis Keane; Patrick Lynch; Marites De La Torre; Ronnie De La Torre; Peng Lim; et al. (ISSCC, 2014)

A Heterogeneous 3D-IC Consisting of Two 28 nm FPGA Die and 32 Reconfigurable High-Performance Data Converters. - Christophe Erdmann; Donnacha Lowney; Adrian Lynam; Aidan Keady; John McGrath; Edward Cullen; Daire Breathnach; Denis Keane; Patrick Lynch; Marites De La Torre; Ronnie De La Torre; Peng Lim; et al. (IEEE J. Solid State Circuits, 2015)

16.1 A 13b 4GS/s digitally assisted dynamic 3-stage asynchronous pipelined-SAR ADC. - Bruno Vaz; Adrian Lynam; Bob Verbruggen; Asma Laraba; Conrado Mesadri; Ali Boumaalif; John McGrath; Umanath Kamath; Ronnie De La Torre; Alvin Manlapat; Daire Breathnach; Christophe Erdmann; et al. (ISSCC, 2017)