Gordon: using flash memory to build fast, power-efficient clusters for data-intensive applications. - Adrian M. Caulfield; Laura M. Grupp; Steven Swanson (ASPLOS, 2009)

Characterizing flash memory: anomalies, observations, and applications. - Laura M. Grupp; Adrian M. Caulfield; Joel Coburn; Steven Swanson; Eitan Yaakobi; Paul H. Siegel; Jack K. Wolf (MICRO, 2009)

Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories. - Adrian M. Caulfield; Arup De; Joel Coburn; Todor I. Mollow; Rajesh K. Gupta 001; Steven Swanson (MICRO, 2010)

Understanding the Impact of Emerging Non-Volatile Memories on High-Performance, IO-Intensive Computing. - Adrian M. Caulfield; Joel Coburn; Todor I. Mollov; Arup De; Ameen Akel; Jiahua He; Arun Jagatheesan; Rajesh K. Gupta 001; Allan Snavely; Steven Swanson (SC, 2010)

Gordon: An Improved Architecture for Data-Intensive Applications. - Adrian M. Caulfield; Laura M. Grupp; Steven Swanson (IEEE Micro, 2010)

NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories. - Joel Coburn; Adrian M. Caulfield; Ameen Akel; Laura M. Grupp; Rajesh K. Gupta 001; Ranjit Jhala; Steven Swanson (ASPLOS, 2011)

Onyx: A Prototype Phase Change Memory Storage Array. - Ameen Akel; Adrian M. Caulfield; Todor I. Mollov; Rajesh K. Gupta 001; Steven Swanson (HotStorage, 2011)

Providing safe, user space access to fast, solid state disks. - Adrian M. Caulfield; Todor I. Mollov; Louis Alex Eisner; Arup De; Joel Coburn; Steven Swanson (ASPLOS, 2012)

QuickSAN: a storage area network for fast, distributed, solid state disks. - Adrian M. Caulfield; Steven Swanson (ISCA, 2013)

Refactor, Reduce, Recycle: Restructuring the I/O Stack for the Future of Storage. - Steven Swanson; Adrian M. Caulfield (Computer, 2013)

Moneta: A Storage System for Fast Non-Volatile Memories. - Adrian M. Caulfield (2013)

Agile Co-Design for a Reconfigurable Datacenter. - Shlomi Alkalay; Hari Angepat; Adrian M. Caulfield; Eric S. Chung; Oren Firestein; Michael Haselman; Stephen Heil; Kyle Holohan; Matt Humphrey; Tamás Juhász; Puneet Kaur; Sitaram Lanka; et al. (FPGA, 2016)

A cloud-scale acceleration architecture. - Adrian M. Caulfield; Eric S. Chung; Andrew Putnam; Hari Angepat; Jeremy Fowers; Michael Haselman; Stephen Heil; Matt Humphrey; Puneet Kaur; Joo-Young Kim 001; Daniel Lo; Todd Massengill; et al. (MICRO, 2016)

A reconfigurable fabric for accelerating large-scale datacenter services. - Andrew Putnam; Adrian M. Caulfield; Eric S. Chung; Derek Chiou; Kypros Constantinides; John Demme; Hadi Esmaeilzadeh; Jeremy Fowers; Gopi Prashanth Gopal; Jan Gray; Michael Haselman; Scott Hauck; et al. (Commun. ACM, 2016)

HPC on FPGA clouds: 3D FFTs and implications for molecular dynamics. - Jiayi Sheng; Chen Yang 010; Ahmed Sanaullah; Michael Papamichael; Adrian M. Caulfield; Martin C. Herbordt (FPL, 2017)

Configurable Clouds. - Adrian M. Caulfield; Eric S. Chung; Andrew Putnam; Hari Angepat; Daniel Firestone; Jeremy Fowers; Michael Haselman; Stephen Heil; Matt Humphrey; Puneet Kaur; Joo-Young Kim 001; Daniel Lo; et al. (IEEE Micro, 2017)

Beyond SmartNICs: Towards a Fully Programmable Cloud: Invited Paper. - Adrian M. Caulfield; Paolo Costa; Monia Ghobadi (HPSR, 2018)

A Configurable Cloud-Scale DNN Processor for Real-Time AI. - Jeremy Fowers; Kalin Ovtcharov; Michael Papamichael; Todd Massengill; Ming Liu; Daniel Lo; Shlomi Alkalay; Michael Haselman; Logan Adams; Mahdi Ghandi; Stephen Heil; Prerak Patel; et al. (ISCA, 2018)

Azure Accelerated Networking: SmartNICs in the Public Cloud. - Daniel Firestone; Andrew Putnam; Sambrama Mundkur; Derek Chiou; Alireza Dabagh; Mike Andrewartha; Hari Angepat; Vivek Bhanu; Adrian M. Caulfield; Eric S. Chung; Harish Kumar Chandrappa; Somesh Chaturmohta; et al. (NSDI, 2018)

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. - Eric S. Chung; Jeremy Fowers; Kalin Ovtcharov; Michael Papamichael; Adrian M. Caulfield; Todd Massengill; Ming Liu; Daniel Lo; Shlomi Alkalay; Michael Haselman; Maleen Abeydeera; Logan Adams; et al. (IEEE Micro, 2018)

Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor. - Jeremy Fowers; Kalin Ovtcharov; Michael K. Papamichael; Todd Massengill; Ming Liu; Daniel Lo; Shlomi Alkalay; Michael Haselman; Logan Adams; Mahdi Ghandi; Stephen Heil; Prerak Patel; et al. (IEEE Micro, 2019)

SMaRTT-REPS: Sender-based Marked Rapidly-adapting Trimmed & Timed Transport with Recycled Entropies. - Tommaso Bonato; Abdul Kabbani; Daniele De Sensi; Rong Pan; Yanfang Le; Costin Raiciu; Mark Handley; Timo Schneider; Nils Blach; Ahmad Ghalayini; Daniel S. F. Alves; Michael Papamichael; et al. (CoRR, 2024)

Wavefront Threading Enables Effective High-Level Synthesis. - Blake Pelton; Adam Sapek; Ken Eguro; Daniel Lo; Alessandro Forin; Matt Humphrey; Jinwen Xi; David Cox; Rajas Karandikar; Johannes de Fine Licht; Evgeny Babin; Adrian M. Caulfield; et al. (Proc. ACM Program. Lang., 2024)

Ultra Ethernet's Design Principles and Architectural Innovations. - Torsten Hoefler; Karen Schramm; Eric Spada; Keith D. Underwood; Cedell Alexander; Bob Alverson; Paul Bottorff; Adrian M. Caulfield; Mark Handley; Cathy Huang; Costin Raiciu; Abdul Kabbani; et al. (CoRR, 2025)