Symbolic sensitivity analysis in the sizing of analog integrated circuits. - Adriana C. Sanabria-Borbon; Esteban Tlelo-Cuautle (CCE, 2013)

Sizing analog integrated circuits by combining gm/ID technique and evolutionary algorithms. - Adriana Carolina Sanabria-Borbon; Esteban Tlelo-Cuautle (MWSCAS, 2014)

Thwarting analog IC piracy via combinational locking. - Jiafan Wang 002; Congyin Shi; Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio; Jiang Hu (ITC, 2017)

Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives. - Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio (LASCAS, 2017)

Surrogate-based Optimization-aided Design for Low Power Analog Circuits. - Sergio Soto Aguilar; Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio (MWSCAS, 2018)

A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. - Sanghoon Lee 008; Congyin Shi; Jiafan Wang 002; Adriana C. Sanabria-Borbon; Hatem Osman; Jiang Hu; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Breaking Analog Locking Techniques via Satisfiability Modulo Theories. - Nithyashankari Gummidipoondi Jayasankaran; Adriana C. Sanabria-Borbon; Amr Abuellil; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan Rajendran (ITC, 2019)

Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits. - Adriana C. Sanabria-Borbon; Nithyashankari Gummidipoondi Jayasankaran; S. Y. Lee; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan (JV) Rajendran (ITC, 2020)

Breaking Analog Locking Techniques. - Nithyashankari Gummidipoondi Jayasankaran; Adriana C. Sanabria-Borbon; Amr Abuellil; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan Rajendran (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Synthesis of High-Order Continuously Tunable Low-Pass Active-R Filters. - Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges. - Adriana C. Sanabria-Borbon; Nithyashankari Gummidipoondi Jayasankaran; Jiang Hu; Jeyavijayan Rajendran; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. - Nithyashankari Gummidipoondi Jayasankaran; Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan Rajendran (IEEE Trans. Emerg. Top. Comput., 2022)