Prototyping Efficient Interprocessor Communication Mechanisms. - Vassilis Papaefstathiou; Dionisios N. Pnevmatikatos; Manolis Marazakis; Giorgos Kalokairinos; Aggelos Ioannou; Michael Papamichael; Stamatis G. Kavadias; Giorgos Mihelogiannakis; Manolis Katevenis (ICSAMOS, 2007)

Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. - Aggelos Ioannou; Manolis Katevenis (IEEE/ACM Trans. Netw., 2007)

HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE. - Pavlos Malakonakis; Konstantinos Georgopoulos; Aggelos Ioannou; Luciano Lavagno; Ioannis Papaefstathiou; Iakovos Mavroidis (ARC, 2018)

Efficient Convolutional Neural Network Weight Compression for Space Data Classification on Multi-fpga Platforms. - George Pitsis; Grigorios Tsagkatakis; Christos Kozanitis; Ioannis Kalomoiris; Aggelos Ioannou; Apostolos Dollas; Manolis G. H. Katevenis; Panagiotis Tsakalides (ICASSP, 2019)

Optimized FPGA Implementation of a Compute-Intensive Oil Reservoir Simulation Algorithm. - Aggelos D. Ioannou; Pavlos Malakonakis; Konstantinos Georgopoulos; Ioannis Papaefstathiou; Apostolos Dollas; Iakovos Mavroidis (SAMOS, 2019)

Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping. - Fabien Chaix; Georgios Ailamakis; Theocharis Vavouris; Astrinos Damianakis; Manolis Katevenis; Iakovos Mavroidis; Aggelos Ioannou; Nikolaos Kossifidis; Nikolaos Dimou; Giorgos Ieronymakis; Manolis Marazakis; Vassilis Papaefstathiou; et al. (H2RC@SC, 2019)

FPGA-based Multi-Chip Module for High-Performance Computing. - Yann Beilliard; Maxime Godard; Aggelos Ioannou; Astrinos Damianakis; Michael Ligerakis; Iakovos Mavroidis; Pierre-Yves Martinez; David Danovitch; Julien Sylvestre; Dominique Drouin (CoRR, 2019)

Moving Compute towards Data in Heterogeneous multi-FPGA Clusters using Partial Reconfiguration and I/O Virtualisation. - Khoa Dang Pham; Dirk Koch; Anuj Vaishnav; Konstantinos Georgopoulos; Pavlos Malakonakis; Aggelos Ioannou; Iakovos Mavroidis (FPT, 2020)

UNILOGIC: A Novel Architecture for Highly Parallel Reconfigurable Systems. - Aggelos D. Ioannou; Konstantinos Georgopoulos; Pavlos Malakonakis; Dionisios N. Pnevmatikatos; Vassilis D. Papaefstathiou; Ioannis Papaefstathiou; Iakovos Mavroidis (ACM Trans. Reconfigurable Technol. Syst., 2020)

RED-SEA: Network Solution for Exascale Architectures. - Andrea Biagioni; Paolo Cretaro; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; Matteo Turisini; Piero Vicini; Roberto Ammendola; et al. (DSD, 2022)

Early Results of Mapping Industrial Applications on Heterogeneous HPC Systems: The OPTIMA Project. - Dimitris Theodoropoulos; Giorgos Pekridis; Panagiotis Miliadis; Chloe Alverti; Panagiotis Mpakos; Dionisios N. Pnevmatikatos; Pavlos Malakonakis; Konstantinos Georgopoulos; Iakovos Mavroidis; Gino Perna; Marisa Zanotti; Giovanni Isotton; et al. (CF, 2023)

Optimizing Industrial Applications for Heterogeneous HPC Systems: The OPTIMA Project Intermediate stage. - Dimitris Theodoropoulos; Olivier Michel; Pavlos Malakonakis; Konstantinos Georgopoulos; Giovanni Isotton; Dionisios N. Pnevmatikatos; Ioannis Papaefstathiou; Gino Perna; Marisa Zanotti; Panagiotis Miliadis; Panagiotis Mpakos; Chloe Alverti; et al. (DATE, 2023)

The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack. - Manolis Ploumidis; Fabien Chaix; Nikolaos Chrysos; Marios Asiminakis; Vassilis Flouris; Nikolaos D. Kallimanis; Nikolaos Kossifidis; Michael Nikoloudakis; Polydoros Petrakis; Nikolaos Dimou; Michalis Gianioudis; Georgios Ieronymakis; et al. (CoRR, 2023)

Low-latency Communication in RISC-V Clusters. - Michalis Gianioudis; Pantelis Xirouchakis; Charisios Loukas; Evangelos Mageiropoulos; Orestis Mousouros; Sokratis Mpartzis; Aggelos Ioannou; Vassilis Papaefstathiou; Manolis Katevenis; Nikolaos Chrysos (HPC Asia, 2024)

RED-SEA Project: Towards a new-generation European interconnect. - María Engracia Gómez; Julio Sahuquillo; Andrea Biagioni; Nikos Chrysos; Damien Berton; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; et al. (Microprocess. Microsystems, 2024)

The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack. - Manolis Ploumidis; Fabien Chaix; Nikolaos Chrysos; Marios Assiminakis; Nikolaos D. Kallimanis; Nikolaos Kossifidis; Michael Nikoloudakis; Nikolaos Dimou; Michalis Gianioudis; George Ieronymakis; Aggelos Ioannou; George Kalokerinos; et al. (ACM Trans. Reconfigurable Technol. Syst., 2025)