High-performance BiCMOS 100 K-gate array. - James D. Gallia; Ah-Lyan Yee; Kwok Kit Chau; I-Fay Wang; Harvey Davis; Shobana Swamy; Van M. Nguyen; Kamalesh Natvarlal Ruparel; Kermit Moore; Brian Chae; Carl E. Lemonds; Pat Eyres; et al. (IEEE J. Solid State Circuits, 1990)

A 6.25-Gb/s binary transceiver in 0.13-μm CMOS for serial data transmission across high loss legacy backplane channels. - Robert Payne; Paul E. Landman; Bhavesh Bhakta; Sridhar Ramaswamy; Song Wu; John D. Powers; M. Ulvi Erdogan; Ah-Lyan Yee; Richard Gu; Lin Wu; Yiqun Xie; Bharadwaj Parthasarathy; et al. (IEEE J. Solid State Circuits, 2005)

A 6.25GHz 1V LC-PLL in 0.13µm CMOS. - Richard Gu; Ah-Lyan Yee; Yiqun Xie; Wai Lee (ISSCC, 2006)