A high-performance, yet simple to design, digital-friendly type-I PLL. - Ahmad Sharkia; Sankaran Aniruddhan; Sudip Shekhar; Shahriar Mirabbasi (CICC, 2015)

A 0.01mm2 4.6-to-5.6GHz sub-sampling type-I frequency synthesizer with -254dB FOM. - Ahmad Sharkia; Shahriar Mirabbasi; Sudip Shekhar (ISSCC, 2018)

A Type-I Sub-Sampling PLL With a 100×100 µm2 Footprint and -255-dB FOM. - Ahmad Sharkia; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2018)

A 10-Gb/s -18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- $ mu$ m CMOS. - Spoorthi Nayak; Abdelrahman H. Ahmed; Ahmad Sharkia; Ajith Sivadhasan Ramani; Shahriar Mirabbasi; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter. - Ahmad Sharkia; Sankaran Aniruddhan; Shahriar Mirabbasi; Sudip Shekhar (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Hierarchical Self-Interference Canceller for Full-Duplex LPWAN Applications Achieving 52-70-dB RF Cancellation. - Hany Abolmagd; Raghav Subbaraman; Omid Esmaeeli; Yeswanth Guntupalli; Ahmad Sharkia; Dinesh Bharadia; Sudip Shekhar (IEEE J. Solid State Circuits, 2023)

A Serrodyne Modulator-Based Fractional Frequency Synthesis Technique for Low-Noise, GHz-Rate Clocking. - Ahmad Sharkia; Shahriar Mirabbasi; Sudip Shekhar (IEEE J. Solid State Circuits, 2023)