Binary particle swarm optimization (BPSO) based state assignment for area minimization of sequential circuits. - Aiman H. El-Maleh; Ahmad T. Sheikh; Sadiq M. Sait (Appl. Soft Comput., 2013)

An integrated fault tolerance technique for combinational circuits based on implications and transistor sizing. - Ahmad T. Sheikh; Aiman H. El-Maleh (Integr., 2017)

A Fault Tolerance Technique for Combinational Circuits Based on Selective-Transistor Redundancy. - Ahmad T. Sheikh; Aiman H. El-Maleh; Muhammad E. S. Elrabaa; Sadiq M. Sait (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Double Modular Redundancy (DMR) Based Fault Tolerance Technique for Combinational Circuits. - Ahmad T. Sheikh; Aiman H. El-Maleh (J. Circuits Syst. Comput., 2018)

Resilient and Secure System on Chip with Rejuvenation in the Wake of Persistent Attacks. - Ahmad Tariq Sheikh; Ali Shoker; Paulo Esteves Veríssimo (EuroSec@EUROSYS, 2023)

System on Chip Rejuvenation in the Wake of Persistent Attacks. - Ahmad T. Sheikh; Ali Shoker; Paulo Esteves Veríssimo (CoRR, 2023)

Resilient and Secure Programmable System-on-Chip Accelerator Offload. - Inês Pinto Gouveia; Ahmad T. Sheikh; Ali Shoker; Suhaib A. Fahmy; Paulo Esteves Veríssimo (SRDS, 2024)

ResiLogic: Leveraging Composability and Diversity to Design Fault and Intrusion Resilient Chips. - Ahmad T. Sheikh; Ali Shoker; Suhaib A. Fahmy; Paulo Esteves Veríssimo (IEEE Trans. Very Large Scale Integr. Syst., 2025)