Une nouvelle approche pour la vérification des masques des circuits intégrés. - Ahmed Amine Jerraya (1983)

Principles of the SYCO compiler. - Ahmed Amine Jerraya; Patrick Varinot; Robert Jamier; Bernard Courtois (DAC, 1986)

UBIST version of the SYCO's control section compiler. - Kholdoun Torki; Michael Nicolaidis; Ahmed Amine Jerraya; Bernard Courtois (ICCD, 1988)

Contribution à la compilation de silicium et au compilateur SYCO. (Silicon compilation and the syco silicon compiler). - Ahmed Amine Jerraya (1989)

NAUTILE: a safe environment for silicon compilation. - Philippe Bondono; Ahmed Amine Jerraya; Armand Hornik; Bernard Courtois; D. Bonifas (EURO-DAC, 1990)

Meta VHDL for Higher Level Controller Modeling and Synthesis. - Ahmed Amine Jerraya; Pierre G. Paulin; Simon Curry (VLSI, 1991)

Silicon compilation of hierarchical control sections with unified BIST testability. - Michael Nicolaidis; Kholdoun Torki; Ahmed Amine Jerraya; Bernard Courtois (Microprocess. Microsystems, 1991)

AMICAL: Architectural Synthesis based on VHDL. - Inhag Park; Kevin O'Brien; Ahmed Amine Jerraya (Synthesis for Control Dominated Circuits, 1992)

Towards System level modeling and synthesis. - Ahmed Amine Jerraya; Kevin O'Brien; Inhag Park; Bernard Courtois (VLSI Design, 1992)

Linking System Design Tools and Hardware Design Tools. - Ahmed Amine Jerraya; Kevin O'Brien; Tarek Ben Ismail (CHDL, 1993)

Industrial experimentation of high-level synthesis. - Polen Kission; Etienne Closse; Laurent Bergher; Ahmed Amine Jerraya (EURO-DAC, 1993)

COSMOS: a codesign approach for communicating systems. - Tarek Ben Ismail; Mohamed Abid; Ahmed Amine Jerraya (CODES, 1994)

Towards a theory for hardware/software codesign. - Markus Voss; Tarek Ben Ismail; Ahmed Amine Jerraya; Karl-Heinz Kapp (CODES, 1994)

Structured Design Methodology for High-Level Design. - Polen Kission; Hong Ding; Ahmed Amine Jerraya (DAC, 1994)

Interactive System-level Partitioning with PARTIF. - Tarek Ben Ismail; Kevin O'Brien; Ahmed Amine Jerraya (EDAC-ETC-EUROASIC, 1994)

An approach for hardware-software codesign. - Tarek Ben Ismail; Mohamed Abid; Kevin O'Brien; Ahmed Amine Jerraya (RSP, 1994)

Accelerating the design process by using architectural synthesis. - Polen Kission; Hong Ding; Ahmed Amine Jerraya (RSP, 1994)

A Loop-Based Scheduling Algorithm for Hardware Description Languages. - Maher K. Rahmouni; Kevin O'Brien; Ahmed Amine Jerraya (Parallel Process. Lett., 1994)

PPS: a pipeline path-based scheduler. - Maher Rahmouni; Ahmed Amine Jerraya (ED&TC, 1995)

A unified model for co-simulation and co-synthesis of mixed hardware/software systems. - Carlos A. Valderrama; Adel Changuel; P. V. Raghavan; Mohamed Abid; Tarek Ben Ismail; Ahmed Amine Jerraya (ED&TC, 1995)

VHDL based design methodology for hierarchy and component re-use. - Polen Kission; Hong Ding; Ahmed Amine Jerraya (EURO-DAC, 1995)

Formulation and evaluation of scheduling techniques for control flow graphs. - Maher Rahmouni; Ahmed Amine Jerraya (EURO-DAC, 1995)

Composing ActivityCharts/StateCharts, SDL and SAO specifications for codesign in avionics. - Mohamed Romdhani; P. Chambert; Alain Jeffroy; Pierre de Chazelles; Ahmed Amine Jerraya (EURO-DAC, 1995)

Synthesis of system-level communication by an allocation-based approach. - Jean-Marc Daveau; Tarek Ben Ismail; Ahmed Amine Jerraya (ISSS, 1995)

Industrial experience using rule-driven retargetable code generation for multimedia applications. - Clifford Liem; Pierre G. Paulin; Marco Cornero; Ahmed Amine Jerraya (ISSS, 1995)

Modeling and rapid prototyping of avionics using STATEMATE. - Mohamed Romdhani; Alain Jeffroy; Pierre de Chazelles; Abd-El-Kader Sahraoui; Ahmed Amine Jerraya (RSP, 1995)

Synthesis Steps and Design Models for Codesign. - Tarek Ben Ismail; Ahmed Amine Jerraya (Computer, 1995)

PARTIF: Interactive System-level Partitioning. - Tarek Ben Ismail; Kevin O'Brien; Ahmed Amine Jerraya (VLSI Design, 1995)

Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. - Elisabeth Berrebi; Polen Kission; Serge Vernalde; S. De Troch; Jean-Claude Herluison; Jean Fréhel; Ahmed Amine Jerraya; Ivo Bolsens (DAC, 1996)

Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures. - Clifford Liem; Pierre G. Paulin; Ahmed Amine Jerraya (DAC, 1996)

A Hardware/Software Codesign Case Study: Design of a Robot Arm Controller. - Mohamed Abid; Adel Changuel; Ahmed Amine Jerraya (ED&TC, 1996)

Exploration of hardware/software design space through a codesign of robot arm controller. - Mohamed Abid; Adel Changuel; Ahmed Amine Jerraya (EURO-DAC, 1996)

Design of an adaptive motors controller based on fuzzy logic using behavioral synthesis. - Adel Changuel; Ahmed Amine Jerraya; Robin Rolland (EURO-DAC, 1996)

Analysis of different protocol description styles in VHDL for high-level synthesis. - Maher Rahmouni; Ahmed Amine Jerraya; Polen Kission; Antonio Carneiro de Mesquita Filho; Aloysio Pedroza; Luci Pirmez (EURO-DAC, 1996)

Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience. - Carlos A. Valderrama; François Naçabal; Pierre G. Paulin; Ahmed Amine Jerraya (RSP, 1996)

A system-level communication synthesis approach for hardware/software systems. - Tarek Ben Ismail; Jean-Marc Daveau; Kevin O'Brien; Ahmed Amine Jerraya (Microprocess. Microsystems, 1996)

Embedded architectural simulation within behavioral synthesis environment. - Abderrazek Jemai; Polen Kission; Ahmed Amine Jerraya (ASP-DAC, 1997)

Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor. - Clifford Liem; Marco Cornero; Miguel Santana; Pierre G. Paulin; Ahmed Amine Jerraya; Jean-Marc Gentit; Jean Lopez; Xavier Figari; Laurent Bergher (DAC, 1997)

ReCode: the design and re-design of the instruction codes for embedded instruction-set processors. - Clifford Liem; Pierre G. Paulin; Ahmed Amine Jerraya (ED&TC, 1997)

Transformational partitioning for co-design of multiprocessor systems. - Gilberto Fernandes Marchioro; Jean-Marc Daveau; Ahmed Amine Jerraya (ICCAD, 1997)

Compilation Methods for the Address Calculation Units of Embedded Processor Systems. - Clifford Liem; Pierre G. Paulin; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 1997)

Virtual Prototyping For Modular And Flexible Hardware-Software Systems. - Carlos A. Valderrama; Adel Changuel; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 1997)

System-on-a-Chip Cosimulation and Compilation. - Clifford Liem; François Naçabal; Carlos A. Valderrama; Pierre G. Paulin; Ahmed Amine Jerraya (IEEE Des. Test Comput., 1997)

Protocol selection and interface generation for HW-SW codesign. - Jean-Marc Daveau; Gilberto Fernandes Marchioro; Tarek Ben Ismail; Ahmed Amine Jerraya (IEEE Trans. Very Large Scale Integr. Syst., 1997)

Guest Editorial Introduction to the Special Issue on the Eighth IEEE International Symposium on System Synthesis. - Ahmed Amine Jerraya; Gert Goossens (IEEE Trans. Very Large Scale Integr. Syst., 1997)

Hardware/software co-design of an ATM network interface card: a case study. - Jean-Marc Daveau; Gilberto Fernandes Marchioro; Ahmed Amine Jerraya (CODES, 1998)

Architectural Simulation in the Context of Behavioral Synthesis. - Abderrazek Jemai; Polen Kission; Ahmed Amine Jerraya (DATE, 1998)

MCI- Multilanguage Distributed Co- Simulation Tool. - Fabiano Hessel; P. LeMarrec; Carlos A. Valderrama; Mohamed Romdhani; Ahmed Amine Jerraya (DIPES, 1998)

Hardware, Software and Mechanical Cosimulation for Automotive Applications. - P. LeMarrec; Carlos A. Valderrama; Fabiano Hessel; Ahmed Amine Jerraya; M. Attia; O. Cayrol (International Workshop on Rapid System Prototyping, 1998)

Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples. - Carlos A. Valderrama; François Naçabal; Pierre G. Paulin; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 1998)

Hardware/Software Co-Design Methodology for Design of Embedded Systems. - Mohamed Abid; Tarek Ben Ismail; Adel Changuel; Carlos A. Valderrama; Mohamed Romdhani; Gilberto Fernandes Marchioro; Jean-Marc Daveau; Ahmed Amine Jerraya (Integr. Comput. Aided Eng., 1998)

Multilanguage design of heterogeneous systems. - Philippe Coste; Fabiano Hessel; P. LeMarrec; Zoltan Sugar; Mohamed Romdhani; Rodolph Suescun; Nacer-Eddine Zergainoh; Ahmed Amine Jerraya (CODES, 1999)

Comparing RTL and Behavioral Design Methodologies in the Case of a 2M-Transistor ATM Shaper. - Imed Moussa; Zoltan Sugar; Rodolph Suescun; Mario Diaz-Nava; Marco Pavesi; Salvatore Crudo; Luca Gazi; Ahmed Amine Jerraya (DAC, 1999)

Multi-Language System Design. - Ahmed Amine Jerraya; Rolf Ernst (DATE, 1999)

Communication Interface Synthesis for Multilanguage Specifications. - Fabiano Hessel; Philippe Coste; P. LeMarrec; Nacer-Eddine Zergainoh; Jean-Marc Daveau; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 1999)

embedded system design with multiple languages: embedded tutorial. - Rolf Ernst; Ahmed Amine Jerraya (ASP-DAC, 2000)

Cycle-True Simulation of the ST10 Microcontroller. - Lovic Gauthier; Ahmed Amine Jerraya (DATE, 2000)

Towards design and validation of mixed-technology SOCs. - Salvador Mir; Benoît Charlot; Gabriela Nicolescu; Philippe Coste; Fabien Parrain; Nacer-Eddine Zergainoh; Bernard Courtois; Ahmed Amine Jerraya; Márta Rencz (ACM Great Lakes Symposium on VLSI, 2000)

Rethinking Behavioral Synthesis for a Better Integration within Existing Design Flows. - Wander O. Cesário; Ahmed Amine Jerraya; Zoltan Sugar; Imed Moussa (ICCD, 2000)

Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification. - Fabiano Hessel; Philippe Coste; Gabriela Nicolescu; P. LeMarrec; Nacer-Eddine Zergainoh; Ahmed Amine Jerraya (ICCD, 2000)

Generic Architecture Platform for Multiprocessor System-On-Chip Design. - Amer Baghdadi; Nacer-Eddine Zergainoh; Damien Lyonnard; Ahmed Amine Jerraya (DIPES, 2000)

Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip. - Nacer-Eddine Zergainoh; Amer Baghdadi; Ludovic Tambour; Damien Lyonnard; Lovic Gauthier; Ahmed Amine Jerraya (DIPES, 2000)

Efficient Integration of Behavioral Synthesis with Existing Design Flows. - Wander O. Cesário; Zoltan Sugar; Imed Moussa; Ahmed Amine Jerraya (ISSS, 2000)

Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. - Amer Baghdadi; Nacer-Eddine Zergainoh; Wander O. Cesário; T. Roudier; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2000)

Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals. - Lovic Gauthier; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2000)

Interlanguage Communication Synthesis for Heterogeneous Specifications. - Fabiano Hessel; Pascal Coste; Philippe Le Marrec; Nacer-Eddine Zergainoh; Gabriela Nicolescu; Jean-Marc Daveau; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 2000)

Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. - Patrice Gerin; Sungjoo Yoo; Gabriela Nicolescu; Ahmed Amine Jerraya (ASP-DAC, 2001)

A higher level system communication model for object-oriented specification and design of embedded systems. - Kjetil Svarstad; Nezih Ben-Fredj; Gabriela Nicolescu; Ahmed Amine Jerraya (ASP-DAC, 2001)

A generic wrapper architecture for multi-processor SoC cosimulation and design. - Sungjoo Yoo; Gabriela Nicolescu; Damien Lyonnard; Amer Baghdadi; Ahmed Amine Jerraya (CODES, 2001)

Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. - Damien Lyonnard; Sungjoo Yoo; Amer Baghdadi; Ahmed Amine Jerraya (DAC, 2001)

An efficient architecture model for systematic design of application-specific multiprocessor SoC. - Amer Baghdadi; Damien Lyonnard; Nacer-Eddine Zergainoh; Ahmed Amine Jerraya (DATE, 2001)

Automatic generation and targeting of application specific operating systems and embedded systems software. - Lovic Gauthier; Sungjoo Yoo; Ahmed Amine Jerraya (DATE, 2001)

Electronic system design methodology: Europe's positioning. - Ahmed Amine Jerraya; Gérard Matheron (DATE, 2001)

Mixed-level cosimulation for fine gradual refinement of communication in SoC design. - Gabriela Nicolescu; Sungjoo Yoo; Ahmed Amine Jerraya (DATE, 2001)

A model for describing communication between aggregate objects in the specification and design of embedded systems. - Kjetil Svarstad; Gabriela Nicolescu; Ahmed Amine Jerraya (DATE, 2001)

Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication. - Sungjoo Yoo; Gabriela Nicolescu; Lovic Gauthier; Ahmed Amine Jerraya (HLDVT, 2001)

Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory. - Samy Meftali; Ferid Gharsalli; Frédéric Rousseau 001; Ahmed Amine Jerraya (VLSI-SOC, 2001)

Programming models for network processors (Panel). - Ahmed Amine Jerraya; Pierre G. Paulin; Richard Norman; Feliks J. Welfeld (ISSS, 2001)

An optimal memory allocation for application-specific multiprocessor system-on-chip. - Samy Meftali; Ferid Gharsalli; Frédéric Rousseau 001; Ahmed Amine Jerraya (ISSS, 2001)

Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design. - Wander O. Cesário; Gabriela Nicolescu; Lovic Gauthier; Damien Lyonnard; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2001)

Colif: A Design Representation for Application-Specific Multiprocessor SOCs. - Wander O. Cesário; Gabriela Nicolescu; Lovic Gauthier; Damien Lyonnard; Ahmed Amine Jerraya (IEEE Des. Test Comput., 2001)

Two Enduring Questions for Computer Design. - Ahmed Amine Jerraya (IEEE Des. Test Comput., 2001)

Application-Specific System-on-a-Chip Multiprocessors. - Wayne H. Wolf; Ahmed Amine Jerraya (IEEE Des. Test Comput., 2001)

Automatic generation and targeting of application-specificoperating systems and embedded systems software. - Lovic Gauthier; Sungjoo Yoo; Ahmed Amine Jerraya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Flot de conception flexible pour la synthèse comportementale - Une approche effective pour l'intégration des outils. - Wander O. Cesário; Ahmed Amine Jerraya (Tech. Sci. Informatiques, 2001)

Component-based design approach for multicore SoCs. - Wander O. Cesário; Amer Baghdadi; Lovic Gauthier; Damien Lyonnard; Gabriela Nicolescu; Yanick Paviot; Sungjoo Yoo; Ahmed Amine Jerraya; Mario Diaz-Nava (DAC, 2002)

Automatic generation of embedded memory wrapper for multiprocessor SoC. - Ferid Gharsalli; Samy Meftali; Frédéric Rousseau 001; Ahmed Amine Jerraya (DAC, 2002)

MEDEA+ and ITRS Roadmaps. - Joseph Borel; Gérard Matheron; Ahmed Amine Jerraya; S. Resve; M. Rogers; Wolfgang Rosenstiel; Irmtraud Rugen-Herzig; F. Theewen (DATE, 2002)

Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. - Sungjoo Yoo; Gabriela Nicolescu; Lovic Gauthier; Ahmed Amine Jerraya (DATE, 2002)

Timed HW-SW cosimulation using native execution of OS and application SW. - Iuliana Bacivarov; Sungjoo Yoo; Ahmed Amine Jerraya (HLDVT, 2002)

Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design. - Ahmed Amine Jerraya; Damien Lyonnard; Samy Meftali; Frédéric Rousseau 001; Ferid Gharsalli (ISSS, 2002)

Validation in a Component-Based Design Flow for Multicore SoCs. - Ahmed Amine Jerraya; Sungjoo Yoo; Aimen Bouchhima; Gabriela Nicolescu (ISSS, 2002)

Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design. - Gabriela Nicolescu; S. Martinez; Lobna Kriaa; Wassim Youssef; Sungjoo Yoo; Benoît Charlot; Ahmed Amine Jerraya (ASP-DAC/VLSI Design, 2002)

Multiprocessor SoC Platforms: A Component-Based Design Approach. - Wander O. Cesário; Damien Lyonnard; Gabriela Nicolescu; Yanick Paviot; Sungjoo Yoo; Ahmed Amine Jerraya; Lovic Gauthier; Mario Diaz-Nava (IEEE Des. Test Comput., 2002)

Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. - Amer Baghdadi; Nacer-Eddine Zergainoh; Wander O. Cesário; Ahmed Amine Jerraya (IEEE Trans. Software Eng., 2002)

Exploration de l'espace des solutions architecturales dans le codesign. - Amer Baghdadi; Nacer-Eddine Zergainoh; Wander O. Cesário; Ahmed Amine Jerraya (Tech. Sci. Informatiques, 2002)

Desiderata pour la spécification et la conception des systèmes électroniques. - Gabriela Nicolescu; Kjetil Svarstad; Wander O. Cesário; Lovic Gauthier; Damien Lyonnard; Sungjoo Yoo; Philippe Coste; Ahmed Amine Jerraya (Tech. Sci. Informatiques, 2002)

Introduction to Hardware Abstraction Layers for SoC. - Sungjoo Yoo; Ahmed Amine Jerraya (Embedded Software for SoC, 2003)

Multi-Level Software Validation for NoC. - Sungjoo Yoo; Gabriela Nicolescu; Iuliana Bacivarov; Wassim Youssef; Aimen Bouchhima; Ahmed Amine Jerraya (Networks on Chip, 2003)

Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTL. - Mohamed-Anouar Dziri; Firaz Samet; Flávio Rech Wagner; Wander O. Cesário; Ahmed Amine Jerraya (ASP-DAC, 2003)

Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. - Sungjoo Yoo; Iuliana Bacivarov; Aimen Bouchhima; Yanick Paviot; Ahmed Amine Jerraya (DATE, 2003)

Introduction to Hardware Abstraction Layers for SoC. - Sungjoo Yoo; Ahmed Amine Jerraya (DATE, 2003)

Definition of a systematic method for the generation of software test programs allowing the functional verification of System On Chip (SoC). - F. Hunsinger; Sebastien Francois; Ahmed Amine Jerraya (MTV, 2003)

Embedded Application Prototyping on a Communication-Restricted Reconfigurable. - Arif Sasongko; Amer Baghdadi; Frédéric Rousseau 001; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2003)

An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells. - Ludovic Tambour; Nacer-Eddine Zergainoh; Pascal Urard; Henri Michel; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2003)

Towards SoC Validation Through Prototyping: A Systematic Approach Based on Reconfigurable Platform. - Arif Sasongko; Amer Baghdadi; Frédéric Rousseau 001; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 2003)

Hot Topics at HLDVT 02. - Ahmed Amine Jerraya (IEEE Des. Test Comput., 2003)

Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model. - Aimen Bouchhima; Sungjoo Yoo; Ahmed Amine Jerraya (ASP-DAC, 2004)

EuroSoC: towards a joint university/industry research infrastructure for system on chip and system in package. - Ahmed Amine Jerraya (ASP-DAC, 2004)

An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. - Sang-Il Han; Amer Baghdadi; Marius Bonaciu; Soo-Ik Chae; Ahmed Amine Jerraya (DAC, 2004)

Debugging HW/SW interface for MPSoC: video encoder system design case study. - Mohamed-Wassim Youssef; Sungjoo Yoo; Arif Sasongko; Yanick Paviot; Ahmed Amine Jerraya (DAC, 2004)

Unified Component Integration Flow for Multi-Processor SoC Design and Validation. - Mohamed-Anouar Dziri; Wander O. Cesário; Flávio Rech Wagner; Ahmed Amine Jerraya (DATE, 2004)

Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software. - Sungjoo Yoo; Mohamed-Wassim Youssef; Aimen Bouchhima; Ahmed Amine Jerraya; Mario Diaz-Nava (DATE, 2004)

Long Term Trends for Embedded System Design. - Ahmed Amine Jerraya (DSD, 2004)

An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. - Ferid Gharsalli; Amer Baghdadi; Marius Bonaciu; Giedrius Majauskas; Wander O. Cesário; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2004)

Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation. - Arnaud Grasset; Frédéric Rousseau 001; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2004)

Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems. - Adriano Sarmento; Wander O. Cesário; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2004)

A generic architecture model based-methodology for an efficient design of hardware/software application-specific multiprocessor System-on-Chip. - Nacer-Eddine Zergainoh; Amer Baghdadi; Ahmed Amine Jerraya (Ann. des Télécommunications, 2004)

Strategies for the integration of hardware and software IP components in embedded systems-on-chip. - Flávio Rech Wagner; Wander O. Cesário; Luigi Carro; Ahmed Amine Jerraya (Integr., 2004)

Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits. - Wander O. Cesário; Lovic Gauthier; Damien Lyonnard; Gabriela Nicolescu; Ahmed Amine Jerraya (J. Syst. Softw., 2004)

Hardware/Software Interfaces Design for SoC. - Wander O. Cesário; Flávio Rech Wagner; Ahmed Amine Jerraya (The Industrial Information Technology Handbook, 2005)

Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. - Aimen Bouchhima; Iuliana Bacivarov; Wassim Youssef; Marius Bonaciu; Ahmed Amine Jerraya (ASP-DAC, 2005)

Scheduler implementation in MP SoC design. - Youngchul Cho; Sungjoo Yoo; Kiyoung Choi; Nacer-Eddine Zergainoh; Ahmed Amine Jerraya (ASP-DAC, 2005)

IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems. - Nacer-Eddine Zergainoh; Katalin Popovici; Ahmed Amine Jerraya; Pascal Urard (ASP-DAC, 2005)

Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design. - Adriano Sarmento; Lobna Kriaa; Arnaud Grasset; Mohamed-Wassim Youssef; Aimen Bouchhima; Frédéric Rousseau 001; Wander O. Cesário; Ahmed Amine Jerraya (CODES+ISSS, 2005)

A unified HW/SW interface model to remove discontinuities between HW and SW design. - Aimen Bouchhima; Xi Chen; Frédéric Pétrot; Wander O. Cesário; Ahmed Amine Jerraya (EMSOFT, 2005)

Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification. - Arnaud Grasset; Frédéric Rousseau 001; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2005)

Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2. - Romain Lemaire; Fabien Clermidy; Yves Durand; Didier Lattard; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2005)

Guest Editors' Introduction: Multiprocessor Systems-on-Chips. - Ahmed Amine Jerraya; Hannu Tenhunen; Wayne H. Wolf (Computer, 2005)

Hardware/Software Interface Codesign for Embedded Systems. - Ahmed Amine Jerraya; Wayne H. Wolf (Computer, 2005)

ChronoSym: a new approach for fast and accurate SoC cosimulation. - Iuliana Bacivarov; Aimen Bouchhima; Sungjoo Yoo; Ahmed Amine Jerraya (Int. J. Embed. Syst., 2005)

Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip. - Nacer-Eddine Zergainoh; Amer Baghdadi; Ahmed Amine Jerraya (Int. J. Embed. Syst., 2005)

Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces. - Ferid Gharsalli; Frédéric Rousseau 001; Ahmed Amine Jerraya (Tech. Sci. Informatiques, 2005)

Méthodes de correction de retard dans les modèles RTL des systèmes monopuces DSP obtenus par assemblage de composants IP : fondement théorique et implémentation. - Nacer-Eddine Zergainoh; Ludovic Tambour; Henri Michel; Ahmed Amine Jerraya (Tech. Sci. Informatiques, 2005)

Hardware/Software Interface Design for SoC. - Ahmed Amine Jerraya; Wander O. Cesário; Flávio Rech Wagner (Embedded Systems Handbook, 2005)

High-level architecture exploration for MPEG4 encoder with custom parameters. - Marius Bonaciu; Aimen Bouchhima; Mohamed-Wassim Youssef; Xi Chen; Wander O. Cesário; Ahmed Amine Jerraya (ASP-DAC, 2006)

Functional modeling techniques for efficient SW code generation of video codec applications. - Sang-Il Han; Soo-Ik Chae; Ahmed Amine Jerraya (ASP-DAC, 2006)

SHAPES: : a tiled scalable software hardware architecture platform for embedded systems. - Pier Stanislao Paolucci; Ahmed Amine Jerraya; Rainer Leupers; Lothar Thiele; Piero Vicini (CODES+ISSS, 2006)

Buffer memory optimization for video codec application modeled in Simulink. - Sang-Il Han; Xavier Guerin; Soo-Ik Chae; Ahmed Amine Jerraya (DAC, 2006)

Programming models and HW-SW interfaces abstraction for multi-processor SoC. - Ahmed Amine Jerraya; Aimen Bouchhima; Frédéric Pétrot (DAC, 2006)

Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. - Florin Dumitrascu; Iuliana Bacivarov; Lorenzo Pieralisi; Marius Bonaciu; Ahmed Amine Jerraya (DATE Designers' Forum, 2006)

Service Based Component Design Approach for Flexible Hardware/Software Interface Modeling. - Lobna Kriaa; Aimen Bouchhima; Wassim Youssef; Frédéric Pétrot; Anne-Marie Fouillart; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2006)

Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach". - Benaoumeur Senouci; Aimen Bouchhima; Frédéric Rousseau 001; Frédéric Pétrot; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2006)

Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems. - Nacer-Eddine Zergainoh; Ludovic Tambour; Pascal Urard; Ahmed Amine Jerraya (EURASIP J. Adv. Signal Process., 2006)

Guest editorial: Concurrent hardware and software design for multiprocessor SoC. - Ahmed Amine Jerraya; Trevor N. Mudge (ACM Trans. Embed. Comput. Syst., 2006)

Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation. - Nacer-Eddine Zergainoh; Ludovic Tambour; Ahmed Amine Jerraya (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC. - Patrice Gerin; Hao Shen 009; A. Chureau; Aimen Bouchhima; Ahmed Amine Jerraya (ASP-DAC, 2007)

Software Performance Estimation in MPSoC Design. - Márcio Oyamada; Flávio Rech Wagner; Marius Bonaciu; Wander O. Cesário; Ahmed Amine Jerraya (ASP-DAC, 2007)

Flexible Application Software Generation for Heterogeneous Multi-Processor System-on-Chip. - Xavier Guerin; Katalin Popovici; Wassim Youssef; Frédéric Rousseau 001; Ahmed Amine Jerraya (COMPSAC (1), 2007)

Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. - Kai Huang 002; Sang-Il Han; Katalin Popovici; Lisane B. de Brisolara; Xavier Guerin; Lei Li; Xiaolang Yan; Soo-Ik Chae; Luigi Carro; Ahmed Amine Jerraya (DAC, 2007)

HW/SW implementation from abstract architecture models. - Ahmed Amine Jerraya (DATE, 2007)

Low Runtime-Overhead Software Synthesis for Communicating Concurrent Processes. - Youngchul Cho; Nacer-Eddine Zergainoh; Kiyoung Choi; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2007)

Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels. - Katalin Popovici; Xavier Guerin; Frédéric Rousseau 001; Pier Stanislao Paolucci; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2007)

Buffer Size Reduction through Control-Flow Decomposition. - Youngchul Cho; Nacer-Eddine Zergainoh; Ahmed Amine Jerraya; Kiyoung Choi (RTCSA, 2007)

Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. - Lisane B. de Brisolara; Sang-Il Han; Xavier Guerin; Luigi Carro; Ricardo Reis 001; Soo-Ik Chae; Ahmed Amine Jerraya (SCOPES, 2007)

Simulink based hardware-software codesign flow for heterogeneous MPSoC. - Katalin Popovici; Ahmed Amine Jerraya (SCSC, 2007)

Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip. - Youngchul Cho; Nacer-Eddine Zergainoh; Sungjoo Yoo; Ahmed Amine Jerraya; Kiyoung Choi (Des. Autom. Embed. Syst., 2007)

Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC. - Sang-Il Han; Soo-Ik Chae; Lisane B. de Brisolara; Luigi Carro; Ricardo Reis 001; Xavier Guerin; Ahmed Amine Jerraya (Des. Autom. Embed. Syst., 2007)

Prototyping Multiprocessor System-on-Chip Applications: A Platform-Based Approach. - Benaoumeur Senouci; Aimen Bouchhima; Frédéric Rousseau 001; Frédéric Pétrot; Ahmed Amine Jerraya (IEEE Distributed Syst. Online, 2007)

Roundtable: Envisioning the Future for Multiprocessor SoC. - Ahmed Amine Jerraya; Olivier Franza; Markus Levy; Masao Nakaya; Pierre G. Paulin; Ulrich Ramacher; Deepu Talla; Wayne H. Wolf (IEEE Des. Test Comput., 2007)

Hardware/software IP integration using the ROSES design environment. - Flávio Rech Wagner; Wander O. Cesário; Ahmed Amine Jerraya (ACM Trans. Embed. Comput. Syst., 2007)

Automatically Realising Embedded Systems from High-Level Functional Models. - Pieter J. Mosterman; Don Orofino; Janos Sztipanovits; Ahmed Amine Jerraya; Wido Kruijtzer; Víctor Reyes; Christos G. Cassandras; Grant Martin (DATE, 2008)

Integrating Abstract NoC Models within MPSoC Design. - Edson Ifarraguirre Moreno; Katalin Maria Popovici; Ney Laert Vilar Calazans; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2008)

Parallel Programming of Multi-processor SoC: A HW-SW Interface Perspective. - Lobna Kriaa; Aimen Bouchhima; Marius Gligor; Anne-Marie Fouillart; Frédéric Pétrot; Ahmed Amine Jerraya (Int. J. Parallel Program., 2008)

Multiprocessor System-on-Chip (MPSoC) Technology. - Wayne H. Wolf; Ahmed Amine Jerraya; Grant Martin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Platform-based software design flow for heterogeneous MPSoC. - Katalin Popovici; Xavier Guerin; Frédéric Rousseau 001; Pier Stanislao Paolucci; Ahmed Amine Jerraya (ACM Trans. Embed. Comput. Syst., 2008)

Hardware/Software Interfaces Design for SoC. - Katalin Popovici; Wander O. Cesário; Flávio Rech Wagner; Ahmed Amine Jerraya (Embedded Systems Design and Verification, 2009)

Flexible and abstract communication and interconnect modeling for MPSoC. - Katalin Popovici; Ahmed Amine Jerraya (ASP-DAC, 2009)

Panel session - Multicore, will Startups drive innovation? - Ahmed Amine Jerraya; Rolf Ernst (DATE, 2009)

Embedded tutorial - Understanding multicore technologies. - Ahmed Amine Jerraya; Gabriela Nicolescu (DATE, 2009)

High level modelling and performance evaluation of address mapping in NAND flash memory. - Walid Lafi; Didier Lattard; Ahmed Amine Jerraya (ICECS, 2009)

Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation. - Sang-Il Han; Soo-Ik Chae; Lisane B. de Brisolara; Luigi Carro; Katalin Popovici; Xavier Guerin; Ahmed Amine Jerraya; Kai Huang 002; Lei Li; Xiaolang Yan (Integr., 2009)

Convergence of design and fabrication technologies, a key enabler for HW-SW integration. - Ahmed Amine Jerraya (ASAP, 2010)

Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem. - Camille Jalier; Didier Lattard; Ahmed Amine Jerraya; Gilles Sassatelli; Pascal Benoit; Lionel Torres (DATE, 2010)

An efficient hierarchical router for large 3D NoCs. - Walid Lafi; Didier Lattard; Ahmed Amine Jerraya (International Symposium on Rapid System Prototyping, 2010)

A 3D reconfigurable platform for 4G telecom applications. - Walid Lafi; Didier Lattard; Ahmed Amine Jerraya (DATE, 2011)

A Stackable LTE Chip for Cost-effective 3D Systems. - Walid Lafi; Didier Lattard; Ahmed Amine Jerraya (IPSJ Trans. Syst. LSI Des. Methodol., 2012)

An asynchronous hierarchical router for networks-on-chip-based three-dimensional multi-processor system-on-chip. - Walid Lafi; Didier Lattard; Ahmed Amine Jerraya (Softw. Pract. Exp., 2012)

Performance Estimation Techniques With MPSoC Transaction-Accurate Models. - De Ma; Rongjie Yan; Kai Huang 002; Min Yu 006; Siwen Xiu; Haitong Ge; Xiaolang Yan; Ahmed Amine Jerraya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Non-coherent detection of M-ary orthogonal signals using Compressive Sensing. - Vincent Lenoir; Didier Lattard; Francois Dehmas; Dominique Morche; Ahmed Amine Jerraya (CSNDSP, 2014)

Computational load reduction by downsampling for energy-efficient digital baseband. - Vincent Lenoir; Didier Lattard; Francois Dehmas; Dominique Morche; Ahmed Amine Jerraya (NEWCAS, 2014)

An energy-efficient IEEE 802.15.4 tunable digital baseband targeting self-adaptive WPANs. - Vincent Lenoir; Didier Lattard; Ahmed Amine Jerraya (ISCAS, 2015)

Design and implementation of a closed-loop controller for a self-adaptive IEEE 802.15.4 DBB. - Vincent Lenoir; Warody Lombardi; Didier Lattard; Ahmed Amine Jerraya (NEWCAS, 2015)

Communication Optimizations for Multithreaded Code Generation from Simulink Models. - Kai Huang 002; Min Yu 006; Rongjie Yan; Xiaomeng Zhang; Xiaolang Yan; Lisane B. de Brisolara; Ahmed Amine Jerraya; Jiong Feng (ACM Trans. Embed. Comput. Syst., 2015)

A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization. - Kai Huang 002; Xiaomeng Zhang; Dandan Zheng 001; Min Yu 006; Xiaowen Jiang 001; Xiaolang Yan; Lisane B. de Brisolara; Ahmed Amine Jerraya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)