A self-clocked ASIC interface for MEMS gyroscope with 1m°/s/√Hz noise floor. - Ayman ElSayed; Ahmed Elshennawy; Ahmed Elmallah; Ahmad Shaban; Botros George; Mostafa Elmala; Ayman H. Ismail; A. Wassal; Mostafa M. Sakr; Ahmed Mokhtar; Mahfooz Hafez; A. Hamed; et al. (CICC, 2011)

10.6 A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS. - Ahmed Elkholy; Ahmed Elmallah; Mohamed Elzeftawi; Ken Chang; Pavan Kumar Hanumolu (ISSCC, 2016)

A 0.7V time-based inductor for fully integrated low bandwidth filter applications. - Braedon Salz; Mrunmay Talegaonkar; Guanghua Shu; Ahmed Elmallah; Romesh Kumar Nandwana; Bibhudatta Sahoo 001; Pavan Kumar Hanumolu (CICC, 2017)

8.6 A 2.5-to-5.75GHz 5mW 0.3psrms-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS. - Daniel Coombs; Ahmed Elkholy; Romesh Kumar Nandwana; Ahmed Elmallah; Pavan Kumar Hanumolu (ISSCC, 2017)

29.6 A 3-to-10Gb/s 5.75pJ/b transceiver with flexible clocking in 65nm CMOS. - Romesh Kumar Nandwana; Saurabh Saxena; Ahmed Elkholy; Mrunmay Talegaonkar; Junheng Zhu; Woo-Seok Choi; Ahmed Elmallah; Pavan Kumar Hanumolu (ISSCC, 2017)

A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS. - Ahmed Elmallah; Mostafa Gamal Ahmed; Ahmed Elkholy; Woo-Seok Choi; Pavan Kumar Hanumolu (CICC, 2018)

A 5GHz 370fsrms 6.5mW clock multiplier using a crystal-oscillator frequency quadrupler in 65nm CMOS. - Karim M. Megawer; Ahmed Elkholy; Daniel Coombs; Mostafa Gamal Ahmed; Ahmed Elmallah; Pavan Kumar Hanumolu (ISSCC, 2018)

A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS. - Mostafa Gamal Ahmed; Mrunmay Talegaonkar; Ahmed Elkholy; Guanghua Shu; Ahmed Elmallah; Alexander V. Rylyakov; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2018)

A 6.75-8.25-GHz -250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier. - Ahmed Elkholy; Ahmed Elmallah; Mostafa Gamal Ahmed; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2018)

A 2.5-5.75-GHz Ring-Based Injection-Locked Clock Multiplier With Background-Calibrated Reference Frequency Doubler. - Ahmed Elkholy; Daniel Coombs; Romesh Kumar Nandwana; Ahmed Elmallah; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2019)

Design of Crystal-Oscillator Frequency Quadrupler for Low-Jitter Clock Multipliers. - Karim M. Megawer; Ahmed Elkholy; Mostafa Gamal Ahmed; Ahmed Elmallah; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2019)

A 6 $ mu$ W ±50 ppm/°C ±1500 ppm/V 1.5 MHz $RC$ Oscillator Using Self-Regulation. - Tianyu Wang 006; Danielle Griffith; Mostafa Gamal Ahmed; Junheng Zhu; Da Wei; Ahmed Elkholy; Ahmed Elmallah; Pavan Kumar Hanumolu (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

3.2 A 0.0088mm2 Resistor-Based Temperature Sensor Achieving 92fJ·K2 FoM in 65nm CMOS. - Amr Khashaba; Junheng Zhu; Ahmed Elmallah; Mostafa Gamal Ahmed; Pavan Kumar Hanumolu (ISSCC, 2020)

Circuits for time-domain signal processing - Ahmed Elmallah (2020)

A 3.2GHz 405fsrms jitter -237.2dB-FoMJIT ring-based fractional-N synthesizer using two-step quantization noise cancellation and piecewise-linear nonlinearity correction. - Ahmed Elmallah; Junheng Zhu; Amr Khashaba; Karim M. Megawer; Ahmed Elkholy; Pavan Kumar Hanumolu (CICC, 2021)

A 3.2-GHz 405 fsrms Jitter -237.2 dB FoMJIT Ring-Based Fractional-N Synthesizer. - Ahmed Elmallah; Junheng Zhu; Amr Khashaba; Karim M. Megawer; Ahmed Elkholy; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2022)

A 4.63pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFET. - Henry Park; Mohammed Abdullatif; Ehung Chen; Ahmed Elmallah; Qaiser Nehal; Miguel Gandara; Tsz-Bin Liu; Amr Khashaba; Joonyeong Lee; Chih-Yi Kuan; Dhinessh Ramachandran; Ruey-Bo Sun; et al. (ISSCC, 2023)