Low complexity HEVC sub-pixel motion estimation technique and its hardware implementation. - Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (ICCE-Berlin, 2016)

A computation and energy reduction technique for HEVC Discrete Cosine Transform. - Ercan Kalali; Ahmet Can Mert; Ilker Hamzaoglu (IEEE Trans. Consumer Electron., 2016)

Pixel correlation based computation and energy reduction techniques for HEVC fractional interpolation. - Ercan Kalali; Ahmet Can Mert; Ilker Hamzaoglu (ICCE-Berlin, 2017)

An FPGA implementation of future video coding 2D transform. - Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (ICCE-Berlin, 2017)

Reconfigurable intra prediction hardware for future video coding. - Hasan Azgin; Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (IEEE Trans. Consumer Electron., 2017)

High performance 2D transform hardware for future video coding. - Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (IEEE Trans. Consumer Electron., 2017)

A Low Power Versatile Video Coding (VVC) Fractional Interpolation Hardware. - Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (DASIP, 2018)

A Reconfigurable Fractional Interpolation Hardware for VVC Motion Compensation. - Hasan Azgin; Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (DSD, 2018)

Efficient Multiple Constant Multiplication Using DSP Blocks in FPGA. - Ahmet Can Mert; Hasan Azgin; Ercan Kalali; Ilker Hamzaoglu (FPL, 2018)

An efficient FPGA implementation of HEVC intra prediction. - Hasan Azgin; Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (ICCE, 2018)

An HEVC fractional interpolation hardware using memory based constant multiplication. - Ahmet Can Mert; Ercan Kalali; Ilker Hamzaoglu (ICCE, 2018)

Novel Approximate Absolute Difference Hardware. - Ahmet Can Mert; Hasan Azgin; Ercan Kalali; Ilker Hamzaoglu (DSD, 2019)

Design and Implementation of a Fast and Scalable NTT-Based Polynomial Multiplier Architecture. - Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (IACR Cryptol. ePrint Arch., 2019)

A Flexible and Scalable NTT Hardware : Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography. - Ahmet Can Mert; Emre Karabulut; Erdinç Öztürk; Erkay Savas; Michela Becchi; Aydin Aysu (DATE, 2020)

Low-Latency ASIC Algorithms of Modular Squaring of Large Integers for VDF Applications. - Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (IACR Cryptol. ePrint Arch., 2020)

FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware. - Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (Microprocess. Microsystems, 2020)

Design and Implementation of Encryption/Decryption Architectures for BFV Homomorphic Encryption Scheme. - Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Accelerator for Computing on Encrypted Data. - Sujoy Sinha Roy; Ahmet Can Mert; Aikata; Sunmin Kwon; Youngsam Shin; Donghoon Yoo (IACR Cryptol. ePrint Arch., 2021)

A Hardware Accelerator for Polynomial Multiplication Operation of CRYSTALS-KYBER PQC Scheme. - Ferhat Yaman; Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (IACR Cryptol. ePrint Arch., 2021)

An Accelerated GPU Library for Homomorphic Encryption Operations of BFV Scheme. - Enes Recep Türkoglu; Ali Sah Özcan; Can Ayduman; Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (ISCAS, 2022)

KaLi: A Crystal for Post-Quantum Security. - Aikata; Ahmet Can Mert; Malik Imran; Samuel Pagliarini; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2022)

Small MACs from Small Permutations. - Maria Eichlseder; Ahmet Can Mert; Christian Rechberger; Markus Schofnegger (IACR Cryptol. ePrint Arch., 2022)

Exploring RNS for Isogeny-based Cryptography. - David Jacquemin; Ahmet Can Mert; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2022)

An Extensive Study of Flexible Design Methods for the Number Theoretic Transform. - Ahmet Can Mert; Emre Karabulut; Erdinç Öztürk; Erkay Savas; Aydin Aysu (IEEE Trans. Computers, 2022)

Low-Latency ASIC Algorithms of Modular Squaring of Large Integers for VDF Evaluation. - Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (IEEE Trans. Computers, 2022)

Efficient number theoretic transform implementation on GPU for homomorphic encryption. - Özgün Özerk; Can Elgezen; Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (J. Supercomput., 2022)

CoHA-NTT: A Configurable Hardware Accelerator for NTT-based Polynomial Multiplication. - Kemal Derya; Ahmet Can Mert; Erdinç Öztürk; Erkay Savas (Microprocess. Microsystems, 2022)

A Survey of Software Implementations for the Number Theoretic Transform. - Ahmet Can Mert; Ferhat Yaman; Emre Karabulut; Erdinç Öztürk; Erkay Savas; Aydin Aysu (SAMOS, 2023)

Efficient Design-Time Flexible Hardware Architecture for Accelerating Homomorphic Encryption. - Can Ayduman; Emre Koçer; Selim Kirbiyik; Ahmet Can Mert; Erkay Savas (VLSI-SoC, 2023)

REED: Chiplet-Based Scalable Hardware Accelerator for Fully Homomorphic Encryption. - Aikata; Ahmet Can Mert; Sunmin Kwon; Maxim Deryabin; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2023)

PROTEUS: A Tool to generate pipelined Number Theoretic Transform Architectures for FHE and ZKP applications. - Florian Hirner; Ahmet Can Mert; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2023)

A Hardware Implementation of MAYO Signature Scheme. - Florian Hirner; Michael Streibl; Ahmet Can Mert; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2023)

Parallel Hardware for Isogeny-based VDF: Attacker's Perspective. - David Jacquemin; Anisha Mukherjee; Ahmet Can Mert; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2023)

Aloha-HE: A Low-Area Hardware Accelerator for Client-Side Operations in Homomorphic Encryption. - Florian Krieger; Florian Hirner; Ahmet Can Mert; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2023)

Kavach: Lightweight masking techniques for polynomial arithmetic in lattice-based cryptography. - Aikata; Andrea Basso 002; Gaëtan Cassiers; Ahmet Can Mert; Sujoy Sinha Roy (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023)

Medha: Microcoded Hardware Accelerator for computing on Encrypted Data. - Ahmet Can Mert; Aikata; Sunmin Kwon; Youngsam Shin; Donghoon Yoo; Yongwoo Lee 002; Sujoy Sinha Roy (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023)

KaLi: A Crystal for Post-Quantum Security Using Kyber and Dilithium. - Aikata; Ahmet Can Mert; Malik Imran; Samuel Pagliarini; Sujoy Sinha Roy (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Unified Cryptoprocessor for Lattice-Based Signature and Key-Exchange. - Aikata; Ahmet Can Mert; David Jacquemin; Amitabh Das; Donald Matthews; Santosh Ghosh; Sujoy Sinha Roy (IEEE Trans. Computers, 2023)

Whipping the Multivariate-based MAYO Signature Scheme using Hardware Platforms. - Florian Hirner; Michael Streibl; Florian Krieger; Ahmet Can Mert; Sujoy Sinha Roy (CCS, 2024)

Exploring the Advantages and Challenges of Fermat NTT in FHE Acceleration. - Andrey Kim; Ahmet Can Mert; Anisha Mukherjee; Aikata; Maxim Deryabin; Sunmin Kwon; HyungChul Kang; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2024)

OpenNTT: An Automated Toolchain for Compiling High-Performance NTT Accelerators in FHE. - Florian Krieger; Florian Hirner; Ahmet Can Mert; Sujoy Sinha Roy (IACR Cryptol. ePrint Arch., 2024)

ModHE: Modular Homomorphic Encryption Using Module Lattices Potentials and Limitations. - Anisha Mukherjee; Aikata; Ahmet Can Mert; Yongwoo Lee 002; Sunmin Kwon; Maxim Deryabin; Sujoy Sinha Roy (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

Proteus: A Pipelined NTT Architecture Generator. - Florian Hirner; Ahmet Can Mert; Sujoy Sinha Roy (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Accelerating Isogeny Walks for VDF Evaluation. - David Jacquemin; Anisha Mukherjee; Ahmet Can Mert; Sujoy Sinha Roy (IACR Commun. Cryptol., 2025)

REED: Chiplet-based Accelerator for Fully Homomorphic Encryption. - Aikata Aikata; Ahmet Can Mert; Sunmin Kwon; Maxim Deryabin; Sujoy Sinha Roy (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)