Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops. - Aika Kamei; Takuya Kojima; Hideharu Amano; Daiki Yokoyama; Hisato Miyauchi; Kimiyoshi Usami; Keizo Hiraga; Kenta Suzuki; Kazuhiro Bessho (MCSoC, 2021)

Power Analysis of Directly-connected FPGA Clusters. - Kensuke Iizuka; Haruna Takagi; Aika Kamei; Kazuei Hironaka; Hideharu Amano (COOL CHIPS, 2022)

Optimal switching time to minimize store energy in MTJ-based flip-flops under process and temperature variations. - Kimiyoshi Usami; Daiki Yokoyama; Aika Kamei; Hideharu Amano (NorCAS, 2022)

A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops. - Aika Kamei; Hideharu Amano; Takuya Kojima; Daiki Yokoyama; Kimiyoshi Usami; Keizo Hiraga; Kenta Suzuki; Kazuhiro Bessho (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Power Analysis and Power Modeling of Directly-Connected FPGA Clusters. - Kensuke Iizuka; Haruna Takagi; Aika Kamei; Kazuei Hironaka; Hideharu Amano (IEICE Trans. Inf. Syst., 2023)

Optimized Two-Step Store Control for MTJ-Based Nonvolatile Flip-Flops to Minimize Store Energy Under Process and Temperature Variations. - Kimiyoshi Usami; Daiki Yokoyama; Aika Kamei; Hideharu Amano; Kenta Suzuki; Keizo Hiraga; Kazuhiro Bessho (IEEE Trans. Very Large Scale Integr. Syst., 2024)