A 2-slot time-division multiplexing (TDM) interconnect network for gigascale integration (GSI). - Ajay Joshi; Jeffrey A. Davis (SLIP, 2004)

Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing. - Ajay Joshi; Jeffrey A. Davis (ACM Great Lakes Symposium on VLSI, 2005)

Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites. - Aashish Phansalkar; Ajay Joshi; Lieven Eeckhout; Lizy Kurian John (ISPASS, 2005)

Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation. - Yue Luo; Ajay Joshi; Aashish Phansalkar; Lizy Kurian John; Joydeep Ghosh (SBAC-PAD, 2005)

Gigascale ASIC/SoC design using wave-pipelined multiplexed (WPM) routing. - Ajay Joshi; Jeffrey A. Davis (SoCC, 2005)

Wave-pipelined multiplexed (WPM) routing for gigascale integration (GSI). - Ajay Joshi; Jeffrey A. Davis (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks. - Ajay Joshi; Lieven Eeckhout; Robert H. Bell Jr.; Lizy Kurian John (IISWC, 2006)

Evaluating Benchmark Subsetting Approaches. - Joshua J. Yi; Resit Sendag; Lieven Eeckhout; Ajay Joshi; David J. Lilja; Lizy Kurian John (IISWC, 2006)

Evaluating the efficacy of statistical simulation for design space exploration. - Ajay Joshi; Joshua J. Yi; Robert H. Bell Jr.; Lieven Eeckhout; Lizy Kurian John; David J. Lilja (ISPASS, 2006)

Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing. - Ajay Joshi; Vinita V. Deodhar; Jeffrey A. Davis (VLSI Design, 2006)

Measuring Benchmark Similarity Using Inherent Program Characteristics. - Ajay Joshi; Aashish Phansalkar; Lieven Eeckhout; Lizy Kurian John (IEEE Trans. Computers, 2006)

Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite. - Aashish Phansalkar; Ajay Joshi; Lizy Kurian John (ISCA, 2007)

Scaling and evaluation of carbon nanotube interconnects for VLSI applications. - Fred Chen; Ajay Joshi; Vladimir Stojanovic; Anantha P. Chandrakasan (Nano-Net, 2007)

Subsetting the SPEC CPU2006 benchmark suite. - Aashish Phansalkar; Ajay Joshi; Lizy K. John (SIGARCH Comput. Archit. News, 2007)

Applying Statistical Sampling for Fast and Efficient Simulation of Commercial Workloads. - Ajay Joshi; Yue Luo; Lizy K. John (IEEE Trans. Computers, 2007)

Design and Optimization of On-Chip Interconnects Using Wave-Pipelined Multiplexed Routing. - Ajay Joshi; Gerald G. Lopez; Jeffrey A. Davis (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics. - Christopher Batten; Ajay Joshi; Jason Orcutt; Anatoly Khilo; Benjamin Moss; Charles Holzwarth; Milos A. Popovic; Hanqing Li; Henry I. Smith; Judy L. Hoyt; Franz X. Kärtner; Rajeev J. Ram; et al. (Hot Interconnects, 2008)

Automatically countering imbalance and its empirical relationship to cost. - Nitesh V. Chawla; David A. Cieslak; Lawrence O. Hall; Ajay Joshi (Data Min. Knowl. Discov., 2008)

Analysing and improving clustering based sampling for microprocessor simulation. - Yue Luo; Ajay Joshi; Aashish Phansalkar; Lizy Kurian John; Joydeep Ghosh (Int. J. High Perform. Comput. Netw., 2008)

Distilling the essence of proprietary workloads into miniature benchmarks. - Ajay Joshi; Lieven Eeckhout; Robert H. Bell Jr.; Lizy Kurian John (ACM Trans. Archit. Code Optim., 2008)

Designing Energy-Efficient Low-Diameter On-Chip Networks with Equalized Interconnects. - Ajay Joshi; Byungsub Kim; Vladimir Stojanovic (Hot Interconnects, 2009)

Design of Reliable and Secure Multipliers by Multilinear Arithmetic Codes. - Zhen Wang 001; Mark G. Karpovsky; Berk Sunar; Ajay Joshi (ICICS, 2009)

Designing multi-socket systems using silicon photonics. - Scott Beamer; Krste Asanovic; Christopher Batten; Ajay Joshi; Vladimir Stojanovic (ICS, 2009)

Silicon-photonic clos networks for global on-chip communication. - Ajay Joshi; Christopher Batten; Yong-Jin Kwon; Scott Beamer; Imran Shamim; Krste Asanovic; Vladimir Stojanovic (NOCS, 2009)

A Modeling and exploration framework for interconnect network design in the nanometer era. - Ajay Joshi; Fred Chen; Vladimir Stojanovic (NOCS, 2009)

Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics. - Christopher Batten; Ajay Joshi; Jason Orcutt; Anatol Khilo; Benjamin Moss; Charles Holzwarth; Milos A. Popovic; Hanqing Li; Henry I. Smith; Judy L. Hoyt; Franz X. Kärtner; Rajeev J. Ram; et al. (IEEE Micro, 2009)

Reliable MLC NAND flash memories based on nonlinear t-error-correcting codes. - Zhen Wang 001; Mark G. Karpovsky; Ajay Joshi (DSN, 2010)

Re-architecting DRAM memory systems with monolithically integrated silicon photonics. - Scott Beamer; Chen Sun 003; Yong-Jin Kwon; Ajay Joshi; Christopher Batten; Vladimir Stojanovic; Krste Asanovic (ISCA, 2010)

A preliminary look at error avoidance in digital logic via feedback equalization. - Zafar Takhirov; Bobak Nazer; Ajay Joshi (Allerton, 2011)

Run-time energy management of manycore systems through reconfigurable interconnects. - Jie Meng; Chao Chen 003; Ayse Kivilcim Coskun; Ajay Joshi (ACM Great Lakes Symposium on VLSI, 2011)

Influence of metallic tubes on the reliability of CNTFET SRAMs: error mechanisms and countermeasures. - Zhen Wang 001; Mark G. Karpovsky; Ajay Joshi (ACM Great Lakes Symposium on VLSI, 2011)

Express Virtual Channels with Taps (EVC-T): A Flow Control Technique for Network-on-Chip (NoC) in Manycore Systems. - Chao Chen 003; Jie Meng; Ayse K. Coskun; Ajay Joshi (Hot Interconnects, 2011)

Performance and energy models for memristor-based 1T1R RRAM cell. - Mahmoud Zangeneh; Ajay Joshi (ACM Great Lakes Symposium on VLSI, 2012)

A multi-layer approach to green computing: Designing energy-efficient digital circuits and manycore architectures. - Ajay Joshi; Chao Chen 003; Zafar Takhirov; Bobak Nazer (IGCC, 2012)

Error mitigation in digital logic using a feedback equalization with schmitt trigger (FEST) circuit. - Zafar Takhirov; Bobak Nazer; Ajay Joshi (ISQED, 2012)

Tutorial T8A: Designing Silicon-Photonic Communication Networks for Manycore Systems. - Ajay Joshi (VLSI Design, 2012)

Designing Chip-Level Nanophotonic Interconnection Networks. - Christopher Batten; Ajay Joshi; Vladimir Stojanovic; Krste Asanovic (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Secure Multipliers Resilient to Strong Fault-Injection Attacks Using Multilinear Arithmetic Codes. - Zhen Wang 001; Mark G. Karpovsky; Ajay Joshi (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Nonlinear Multi-Error Correction Codes for Reliable MLC nand Flash Memories. - Zhen Wang 001; Mark G. Karpovsky; Ajay Joshi (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Energy-efficient pass-transistor-logic using decision feedback equalization. - Zafar Takhirov; Bobak Nazer; Ajay Joshi (ISLPED, 2013)

Sub-threshold logic circuit design using feedback equalization. - Mahmoud Zangeneh; Ajay Joshi (DATE, 2014)

Thermal management of manycore systems with silicon-photonic networks. - Tiansheng Zhang; José L. Abellán; Ajay Joshi; Ayse K. Coskun (DATE, 2014)

Neural network-based accelerators for transcendental function approximation. - Schuyler Eldridge; Florian Raudies; David Zou; Ajay Joshi (ACM Great Lakes Symposium on VLSI, 2014)

Sharing and placement of on-chip laser sources in silicon-photonic NoCs. - Chao Chen 003; Tiansheng Zhang; Pietro Contu; Jonathan Klamkin; Ayse K. Coskun; Ajay Joshi (NOCS, 2014)

Learning to navigate in a virtual world using optic flow and stereo disparity signals. - Florian Raudies; Schuyler Eldridge; Ajay Joshi; Massimiliano Versace (Artif. Life Robotics, 2014)

Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM. - Mahmoud Zangeneh; Ajay Joshi (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Towards General-Purpose Neural Network Computing. - Schuyler Eldridge; Amos Waterland; Margo I. Seltzer; Jonathan Appavoo; Ajay Joshi (PACT, 2015)

Detecting hardware trojans using backside optical imaging of embedded watermarks. - Boyou Zhou; Ronen Adato; Mahmoud Zangeneh; Tianyu Yang; Aydan Uyar; Bennett B. Goldberg; M. Selim Ünlü; Ajay Joshi (DAC, 2015)

Dictionary-based sparse representation for resolution improvement in laser voltage imaging of CMOS integrated circuits. - T. Berkin Cilingiroglu; Mahmoud Zangeneh; Aydan Uyar; W. Clem Karl; Janusz Konrad; Ajay Joshi; Bennett B. Goldberg; M. Selim Ünlü (DATE, 2015)

Leveraging Silicon-Photonic NoC for Designing Scalable GPUs. - Amir Kavyan Ziabari; José L. Abellán; Rafael Ubal; Chao Chen 003; Ajay Joshi; David R. Kaeli (ICS, 2015)

Asymmetric NoC Architectures for GPU Systems. - Amir Kavyan Ziabari; José L. Abellán; Yenai Ma; Ajay Joshi; David R. Kaeli (NOCS, 2015)

Using GUI Design Theory to Develop an Open Source Touchscreen Smartphone GUI. - Daniel Jovan Sooknanan; Ajay Joshi (Comput. Inf. Sci., 2015)

Managing Laser Power in Silicon-Photonic NoC Through Cache and NoC Reconfiguration. - Chao Chen 003; José L. Abellán; Ajay Joshi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems. - Ayse K. Coskun; Anjun Gu; Warren Jin 002; Ajay Joshi; Andrew B. Kahng; Jonathan Klamkin; Yenai Ma; John Recchio; Vaishnav Srinivas; Tiansheng Zhang (DATE, 2016)

Energy-Efficient Adaptive Classifier Design for Mobile Systems. - Zafar Takhirov; Joseph Wang 001; Venkatesh Saligrama; Ajay Joshi (ISLPED, 2016)

Electro-Photonic NoC Designs for Kilocore Systems. - José L. Abellán; Chao Chen 003; Ajay Joshi (ACM J. Emerg. Technol. Comput. Syst., 2016)

UMH: A Hardware-Based Unified Memory Hierarchy for Systems with Multiple Discrete GPUs. - Amir Kavyan Ziabari; Yifan Sun 002; Yenai Ma; Dana Schaa; José L. Abellán; Rafael Ubal; John Kim 001; Ajay Joshi; David R. Kaeli (ACM Trans. Archit. Code Optim., 2016)

Designing Tunable Subthreshold Logic Circuits Using Adaptive Feedback Equalization. - Mahmoud Zangeneh; Ajay Joshi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Using Machine Learning techniques for identification of Chronic Traumatic Encephalopathy related Spectroscopic Biomarkers. - Marcia S. Louis; Michael Alosco; Benjamin Rowland; HuiHun Liao; Joseph Wang 001; Inga Koerte; Martha Shenton; Robert Stern; Ajay Joshi; Alexander P. Lin (AIPR, 2017)

High-performance low-energy implementation of cryptographic algorithms on a programmable SoC for IoT devices. - Boyou Zhou; Manuel Egele; Ajay Joshi (HPEC, 2017)

Field of Groves: An Energy-Efficient Random Forest. - Zafar Takhirov; Joseph Wang 001; Marcia S. Louis; Venkatesh Saligrama; Ajay Joshi (CoRR, 2017)

Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation. - José L. Abellán; Ayse K. Coskun; Anjun Gu; Warren Jin 002; Ajay Joshi; Andrew B. Kahng; Jonathan Klamkin; Cristian Morales; John Recchio; Vaishnav Srinivas; Tiansheng Zhang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Hardware Performance Counters Can Detect Malware: Myth or Fact? - Boyou Zhou; Anmol Gupta; Rasoul Jahanshahi; Manuel Egele; Ajay Joshi (AsiaCCS, 2018)

Leveraging thermally-aware chiplet organization in 2.5D systems to reclaim dark silicon. - Furkan Eris; Ajay Joshi; Andrew B. Kahng; Yenai Ma; Saiful A. Mojumder; Tiansheng Zhang (DATE, 2018)

A cross-layer methodology for design and optimization of networks in 2.5D systems. - Ayse K. Coskun; Furkan Eris; Ajay Joshi; Andrew B. Kahng; Yenai Ma; Vaishnav Srinivas (ICCAD, 2018)

Profiling DNN Workloads on a Volta-based DGX-1 System. - Saiful A. Mojumder; Marcia S. Louis; Yifan Sun 002; Amir Kavyan Ziabari; José L. Abellán; John Kim 001; David R. Kaeli; Ajay Joshi (IISWC, 2018)

Nile: A Programmable Monitoring Coprocessor. - Leila Delshadtehrani; Schuyler Eldridge; Sadullah Canakci; Manuel Egele; Ajay Joshi (IEEE Comput. Archit. Lett., 2018)

MGSim + MGMark: A Framework for Multi-GPU System Research. - Yifan Sun 002; Trinayan Baruah; Saiful A. Mojumder; Shi Dong 002; Rafael Ubal; Xiang Gong; Shane Treadway; Yuhui Bao; Vincent Zhao; José L. Abellán; John Kim 001; Ajay Joshi; et al. (CoRR, 2018)

CUDA Optimized Neural Network Predicts Blood Glucose Control from Quantified Joint Mobility and Anthropometrics. - Sterling Ramroach; Andrew Dhanoo; Brian Cockburn; Ajay Joshi (ICISDM, 2019)

MGPUSim: enabling multi-GPU performance modeling and optimization. - Yifan Sun 002; Trinayan Baruah; Saiful A. Mojumder; Shi Dong 002; Xiang Gong; Shane Treadway; Yuhui Bao; Spencer Hance; Carter McCardwell; Vincent Zhao; Harrison Barclay; Amir Kavyan Ziabari; et al. (ISCA, 2019)

The efficacy of various machine learning models for multi-class classification of RNA-seq expression data. - Sterling Ramroach; Melford John; Ajay Joshi (CoRR, 2019)

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. - Massimo Alioto; Magdy S. Abadir; Tughrul Arslan; Chirn Chye Boon; Andreas Burg 001; Chip-Hong Chang; Meng-Fan Chang; Yao-Wen Chang; Poki Chen; Pasquale Corsonello; Paolo Crovetti; Shiro Dosho; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Valkyrie: Leveraging Inter-TLB Locality to Enhance GPU Performance. - Trinayan Baruah; Yifan Sun 002; Saiful A. Mojumder; José L. Abellán; Yash Ukidave; Ajay Joshi; Norman Rubin; John Kim 001; David R. Kaeli (PACT, 2020)

System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. - Aditya Narayan; Yvain Thonnart; Pascal Vivet; Ajay Joshi; Ayse K. Coskun (DATE, 2020)

Efficient Context-Sensitive CFI Enforcement Through a Hardware Monitor. - Sadullah Canakci; Leila Delshadtehrani; Boyou Zhou; Ajay Joshi; Manuel Egele (DIMVA, 2020)

Griffin: Hardware-Software Support for Efficient Page Migration in Multi-GPU Systems. - Trinayan Baruah; Yifan Sun 002; Ali Tolga Dinçer; Saiful A. Mojumder; José L. Abellán; Yash Ukidave; Ajay Joshi; Norman Rubin; John Kim 001; David R. Kaeli (HPCA, 2020)

Bandwidth Allocation in Silicon-Photonic Networks Using Application Instrumentation. - Aditya Narayan; Ajay Joshi; Ayse K. Coskun (HPEC, 2020)

PHMon: A Programmable Hardware Monitor and Its Security Use Cases. - Leila Delshadtehrani; Sadullah Canakci; Boyou Zhou; Schuyler Eldridge; Ajay Joshi; Manuel Egele (USENIX Security Symposium, 2020)

LEAF-QA: Locate, Encode & Attend for Figure Question Answering. - Ritwick Chaudhry; Sumit Shekhar; Utkarsh Gupta; Pranav Maneriker; Prann Bansal; Ajay Joshi (WACV, 2020)

Gate-Level Validation of Integrated Circuits With Structured-Illumination Read-Out of Embedded Optical Signatures. - Negin Zaraee; Boyou Zhou; Kyle Vigil; Mohammad M. Shahjamali; Ajay Joshi; M. Selim Ünlü (IEEE Access, 2020)

HALCONE : A Hardware-Level Timestamp-based Cache Coherence Scheme for Multi-GPU systems. - Saiful A. Mojumder; Yifan Sun 002; Leila Delshadtehrani; Yenai Ma; Trinayan Baruah; José L. Abellán; John Kim 001; David R. Kaeli; Ajay Joshi (CoRR, 2020)

Custom Tailored Suite of Random Forests for Prefetcher Adaptation. - Furkan Eris; Sadullah Canakci; Cansu Demirkiran; Ajay Joshi (CoRR, 2020)

MGPU-TSM: A Multi-GPU System with Truly Shared Memory. - Saiful A. Mojumder; Yifan Sun 002; Leila Delshadtehrani; Yenai Ma; Trinayan Baruah; José L. Abellán; John Kim 001; David R. Kaeli; Ajay Joshi (CoRR, 2020)

Efficient Sealable Protection Keys for RISC-V. - Leila Delshadtehrani; Sadullah Canakci; Manuel Egele; Ajay Joshi (CoRR, 2020)

BlackParrot: An Agile Open-Source RISC-V Multicore for Accelerator SoCs. - Daniel Petrisko; Farzam Gilani; Mark Wyse; Dai Cheol Jung; Scott Davidson 004; Paul Gao 001; Chun Zhao; Zahra Azad; Sadullah Canakci; Bandhav Veluri; Tavio Guarino; Ajay Joshi; et al. (IEEE Micro, 2020)

Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5-D Systems. - Ayse K. Coskun; Furkan Eris; Ajay Joshi; Andrew B. Kahng; Yenai Ma; Aditya Narayan; Vaishnav Srinivas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

FlexFilt: Towards Flexible Instruction Filtering for Security. - Leila Delshadtehrani; Sadullah Canakci; William Blair; Manuel Egele; Ajay Joshi (ACSAC, 2021)

DirectFuzz: Automated Test Generation for RTL Designs using Directed Graybox Fuzzing. - Sadullah Canakci; Leila Delshadtehrani; Furkan Eris; Michael Bedford Taylor; Manuel Egele; Ajay Joshi (DAC, 2021)

SealPK: Sealable Protection Keys for RISC-V. - Leila Delshadtehrani; Sadullah Canakci; Manuel Egele; Ajay Joshi (DATE, 2021)

TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems. - Yenai Ma; Leila Delshadtehrani; Cansu Demirkiran; José L. Abellán; Ajay Joshi (DATE, 2021)

Hardware Acceleration for DBMS Machine Learning Scoring: Is It Worth the Overheads? - Zahra Azad; Rathijit Sen; Kwanghyun Park 001; Ajay Joshi (ISPASS, 2021)

GNNMark: A Benchmark Suite to Characterize Graph Neural Network Training on GPUs. - Trinayan Baruah; Kaustubh Shivdikar; Shi Dong 002; Yifan Sun 002; Saiful A. Mojumder; Kihoon Jung; José L. Abellán; Yash Ukidave; Ajay Joshi; John Kim 001; David R. Kaeli (ISPASS, 2021)

AI Tax in Mobile SoCs: End-to-end Performance Analysis of Machine Learning in Smartphones. - Michael Buch; Zahra Azad; Ajay Joshi; Vijay Janapa Reddi (ISPASS, 2021)

Network-on-Chip Microarchitecture-based Covert Channel in GPUs. - Jaeguk Ahn; Jiho Kim; Hans Kasan; Zhixian Jin; Leila Delshadtehrani; WonJun Song; Ajay Joshi; John Kim 001 (MICRO, 2021)

A Cautionary Tale About Detecting Malware Using Hardware Performance Counters and Machine Learning. - Boyou Zhou; Anmol Gupta; Rasoul Jahanshahi; Manuel Egele; Ajay Joshi (IEEE Des. Test, 2021)

Does Fully Homomorphic Encryption Need Compute Acceleration? - Leo de Castro; Rashmi Agrawal 001; Rabia Tugce Yazicigil; Anantha P. Chandrakasan; Vinod Vaikuntanathan; Chiraag Juvekar; Ajay Joshi (IACR Cryptol. ePrint Arch., 2021)

Accelerating Data-Parallel Neural Network Training with Weighted-Averaging Reparameterisation. - Sterling Ramroach; Ajay Joshi (Parallel Process. Lett., 2021)

Hardware Trojan Detection Using Backside Optical Imaging. - Boyou Zhou; Aydan Aksoylar; Kyle Vigil; Ronen Adato; Jian Tan; Bennett B. Goldberg; M. Selim Ünlü; Ajay Joshi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

NaviSim: A Highly Accurate GPU Simulator for AMD RDNA GPUs. - Yuhui Bao; Yifan Sun 002; Zlatan Feric; Michael Tian Shen; Micah Weston; José L. Abellán; Trinayan Baruah; John Kim 001; Ajay Joshi; David R. Kaeli (PACT, 2022)

TargetFuzz: Using DARTs to Guide Directed Greybox Fuzzers. - Sadullah Canakci; Nikolay Matyunin; Kalman Graffi; Ajay Joshi; Manuel Egele (AsiaCCS, 2022)

Hydra: A near hybrid memory accelerator for CNN inference. - Palash Das; Ajay Joshi; Hemangee K. Kapoor (DATE, 2022)

RACE: RISC-V SoC for En/decryption Acceleration on the Edge for Homomorphic Computation. - Zahra Azad; Guowei Yang 005; Rashmi Agrawal 001; Daniel Petrisko; Michael B. Taylor; Ajay Joshi (ISLPED, 2022)

Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs. - Kaustubh Shivdikar; Gilbert Jonatan; Evelio Mora; Neal Livesay; Rashmi Agrawal 001; Ajay Joshi; José L. Abellán; John Kim 001; David R. Kaeli (SEED, 2022)

ProcessorFuzz: Guiding Processor Fuzzing using Control and Status Registers. - Sadullah Canakci; Chathura Rajapaksha; Anoop Mysore Nataraja; Leila Delshadtehrani; Michael B. Taylor; Manuel Egele; Ajay Joshi (CoRR, 2022)

Architecting Optically Controlled Phase Change Memory. - Aditya Narayan; Yvain Thonnart; Pascal Vivet; Ayse K. Coskun; Ajay Joshi (ACM Trans. Archit. Code Optim., 2022)

SIGFuzz: A Framework for Discovering Microarchitectural Timing Side Channels. - Chathura Rajapaksha; Leila Delshadtehrani; Manuel Egele; Ajay Joshi (DATE, 2023)

ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance. - Sadullah Canakci; Chathura Rajapaksha; Leila Delshadtehrani; Anoop Mysore Nataraja; Michael Bedford Taylor; Manuel Egele; Ajay Joshi (HOST, 2023)

FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. - Rashmi Agrawal 001; Leo de Castro; Guowei Yang 005; Chiraag Juvekar; Rabia Tugce Yazicigil; Anantha P. Chandrakasan; Vinod Vaikuntanathan; Ajay Joshi (HPCA, 2023)

Processing-in-Memory Using Optically-Addressed Phase Change Memory. - Guowei Yang 005; Cansu Demirkiran; Zeynep Ece Kizilates; Carlos A. Ríos Ocampo; Ayse K. Coskun; Ajay Joshi (ISLPED, 2023)

MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption. - Rashmi Agrawal 001; Leo de Castro; Chiraag Juvekar; Anantha P. Chandrakasan; Vinod Vaikuntanathan; Ajay Joshi (MICRO, 2023)

GME: GPU-based Microarchitectural Extensions to Accelerate Homomorphic Encryption. - Kaustubh Shivdikar; Yuhui Bao; Rashmi Agrawal 001; Michael Tian Shen; Gilbert Jonatan; Evelio Mora; Alexander Ingare; Neal Livesay; José L. Abellán; John Kim 001; Ajay Joshi; David R. Kaeli (MICRO, 2023)

Leveraging Residue Number System for Designing High-Precision Analog Deep Neural Network Accelerators. - Cansu Demirkiran; Rashmi Agrawal; Vijay Janapa Reddi; Darius Bunandar; Ajay Joshi (CoRR, 2023)

A Blueprint for Precise and Fault-Tolerant Analog Neural Networks. - Cansu Demirkiran; Lakshmi Nair; Darius Bunandar; Ajay Joshi (CoRR, 2023)

Accelerating DNN Training With Photonics: A Residue Number System-Based Design. - Cansu Demirkiran; Guowei Yang 005; Darius Bunandar; Ajay Joshi (CoRR, 2023)

Towards Efficient Hyperdimensional Computing Using Photonics. - Farbin Fayza; Cansu Demirkiran; Hanning Chen; Che-Kai Liu; Avi Mohan; Hamza Errahmouni Barkam; Sanggeon Yun; Mohsen Imani; David Zhang; Darius Bunandar; Ajay Joshi (CoRR, 2023)

Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs. - Neal Livesay; Gilbert Jonatan; Evelio Mora; Kaustubh Shivdikar; Rashmi Agrawal 001; Ajay Joshi; José L. Abellán; John Kim 001; David R. Kaeli (IEEE Micro, 2023)

On Architecting Fully Homomorphic Encryption-based Computing Systems - Rashmi Agrawal; Ajay Joshi (Springer, 2023)

Puppeteer: A Random Forest Based Manager for Hardware Prefetchers Across the Memory Hierarchy. - Furkan Eris; Marcia S. Louis; Kubra Eris; José Luis Abellán Miguel; Ajay Joshi (ACM Trans. Archit. Code Optim., 2023)

An Electro-Photonic System for Accelerating Deep Neural Networks. - Cansu Demirkiran; Furkan Eris; Gongyu Wang; Jonathan Elmhurst; Nick Moore; Nicholas C. Harris; Ayon Basumallik; Vijay Janapa Reddi; Ajay Joshi; Darius Bunandar (ACM J. Emerg. Technol. Comput. Syst., 2023)

RISE: RISC-V SoC for En/Decryption Acceleration on the Edge for Homomorphic Encryption. - Zahra Azad; Guowei Yang 005; Rashmi Agrawal 001; Daniel Petrisko; Michael Bedford Taylor; Ajay Joshi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

IOMMU Deferred Invalidation Vulnerability: Exploit and Defense. - Chathura Rajapaksha; Leila Delshadtehrani; Richard Muri; Manuel Egele; Ajay Joshi (DATE, 2024)

A Robot-Administered ICU Confusion Assessment with Brain-Computer Interface Control. - Ajay Joshi; Lynne Baillie; Carl Bettosi (HRI (Companion), 2024)

HEAP: A Fully Homomorphic Encryption Accelerator with Parallelized Bootstrapping. - Rashmi S. Agrawal 001; Anantha P. Chandrakasan; Ajay Joshi (ISCA, 2024)

Mirage: An RNS-Based Photonic Accelerator for DNN Training. - Cansu Demirkiran; Guowei Yang 005; Darius Bunandar; Ajay Joshi (ISCA, 2024)

NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator. - Kaustubh Shivdikar; Nicolas Bohm Agostini; Malith Jayaweera; Gilbert Jonatan; José L. Abellán; Ajay Joshi; John Kim 001; David R. Kaeli (ISCA, 2024)

SOPHIE: A Scalable Recurrent Ising Machine Using Optically Addressed Phase Change Memory. - Guowei Yang 005; Sina Karimi; Carlos A. Ríos Ocampo; Ayse K. Coskun; Ajay Joshi (MICRO, 2024)

Photonics for Sustainable Computing. - Farbin Fayza; Satyavolu Papa Rao; Darius Bunandar; Udit Gupta; Ajay Joshi (CoRR, 2024)

Scalability Limitations of Processing-in-Memory using Real System Evaluations. - Gilbert Jonatan; Haeyoon Cho 002; Hyojun Son; Xiangyu Wu; Neal Livesay; Evelio Mora; Kaustubh Shivdikar; José L. Abellán; Ajay Joshi; David R. Kaeli; John Kim 001 (Proc. ACM Meas. Anal. Comput. Syst., 2024)

PIMnet: A Domain-Specific Network for Efficient Collective Communication in Scalable PIM. - Hyojun Son; Gilbert Jonatan; Xiangyu Wu; Haeyoon Cho 002; Kaustubh Shivdikar; José L. Abellán; Ajay Joshi; David R. Kaeli; John Kim 001 (HPCA, 2025)

TrioSim: A Lightweight Simulator for Large-Scale DNN Workloads on Multi-GPU Systems. - Ying Li 049; Yuhui Bao; Gongyu Wang; Xinxin Mei; Pranav Vaid; Anandaroop Ghosh; Adwait Jog; Darius Bunandar; Ajay Joshi; Yifan Sun 002 (ISCA, 2025)

FIDESlib: A Fully-Fledged Open-Source FHE Library for Efficient CKKS on GPUs. - Carlos Agulló-Domingo; Óscar Vera-López; Seyda Guzelhan; Lohit Daksha; Aymane El Jerari; Kaustubh Shivdikar; Rashmi S. Agrawal 001; David R. Kaeli; Ajay Joshi; José L. Abellán (ISPASS, 2025)

Systolic Array-based Accelerator for State-Space Models. - Shiva Raja; Cansu Demirkiran; Aakash Sarkar; Milos A. Popovic; Ajay Joshi (CoRR, 2025)