Spin Wave Logic Circuit on Silicon Platform. - Alexander Khitun; Mingqiang Bao; Yina Wu; Ji-Young Kim; Augustin Hong; Ajey P. Jacob; Kosmas Galatsis; Kang L. Wang (ITNG, 2008)

A Retrospective View on the Technology Evolution to Support Low Power Mobile Application. - Bipul C. Paul; Ajey P. Jacob; William Taylor; Randy W. Mann; Joseph Versaggi; Edward J. Nowak; Lars W. Liebmann (J. Low Power Electron., 2018)

A Segmented Attractor Network for Neuromorphic Associative Learning. - Alexander Jones 001; Rashmi Jha; Ajey P. Jacob; Cory E. Merkel (ICONS, 2019)

A CMOS Compatible Monolithic Fiber Attach Solution with Reliable Performance and Self-Alignment. - Bo Peng; Tymon Barwicz; Asli Sahin; Thomas Houghton; Brittany Hedrick; Yusheng Bian; Michal Rakowski; Shuren Hu; Javier Ayala; Colleen Meagher; Zoey Sowinski; Karen Nummy; et al. (OFC, 2020)

45nm CMOS - Silicon Photonics Monolithic Technology (45CLO) for Next-Generation, Low Power and High Speed Optical Interconnects. - Michal Rakowski; Colleen Meagher; Karen Nummy; Abdelsalam Aboketaf; Javier Ayala; Yusheng Bian; Brendan Harris; Kate McLean; Kevin McStay; Asli Sahin; Louis Medina; Bo Peng; et al. (OFC, 2020)

A neuromorphic SLAM architecture using gated-memristive synapses. - Alexander Jones 001; Andrew Rush; Cory E. Merkel; Eric Herrmann; Ajey P. Jacob; Clare Thiem; Rashmi Jha (Neurocomputing, 2020)

Monolithically integrated silicon nitride platform. - Yusheng Bian; Colleen Meagher; Karen Nummy; Sujith Chandran; Won Suk Lee; Abdelsalam Aboketaf; Danhao Ma; Ryan Sporer; Michal Rakowski; Nuh Yuksek; Monica Esopi; Bo Peng; et al. (OFC, 2021)

Intrinsic Spike Timing Dependent Plasticity in Stochastic Magnetic Tunnel Junctions Mediated by Heat Dynamics. - Humberto Inzunza Velarde; Jheel Nagaria; Zihan Yin; Ajey P. Jacob; Akhilesh R. Jaiswal (CoRR, 2021)

Augmented Memory Computing: Dynamically Augmented SRAM Storage for Data Intensive Applications. - Haripriya Sheshadri; Shwetha Vijayakumar; Ajey P. Jacob; Akhilesh R. Jaiswal (CoRR, 2021)

Towards Energy-Efficient Hyperspectral Image Processing Inside Camera Pixels. - Gourav Datta; Zihan Yin; Ajey P. Jacob; Akhilesh R. Jaiswal; Peter A. Beerel (ECCV Workshops (6), 2022)

Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA. - Sasindu Wijeratne; Akhilesh R. Jaiswal; Ajey P. Jacob; Bingyi Zhang; Viktor K. Prasanna (HPEC, 2022)

Modeling the Energy Efficiency of GEMM using Optical Random Access Memory. - Bingyi Zhang; Akhilesh R. Jaiswal; Clynn Mathew; Ravi Teja Lakkireddy; Ajey P. Jacob; Sasindu Wijeratne; Viktor K. Prasanna (HPEC, 2022)

P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking. - Gourav Datta; Souvik Kundu 002; Zihan Yin; Joe Mathai; Zeyu Liu 003; Zixu Wang; Mulin Tian; Shunlin Lu; Ravi Teja Lakkireddy; Andrew G. Schmidt; Wael Abd-Almageed; Ajey P. Jacob; et al. (VLSI-SoC, 2022)

P2M: A Processing-in-Pixel-in-Memory Paradigm for Resource-Constrained TinyML Applications. - Gourav Datta; Souvik Kundu 002; Zihan Yin; Ravi Teja Lakkireddy; Joe Mathai; Ajey P. Jacob; Peter A. Beerel; Akhilesh R. Jaiswal (CoRR, 2022)

Toward Efficient Hyperspectral Image Processing inside Camera Pixels. - Gourav Datta; Zihan Yin; Ajey P. Jacob; Akhilesh R. Jaiswal; Peter A. Beerel (CoRR, 2022)

Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory (P2M). - Md. Abdullah-Al Kaiser; Gourav Datta; Sreetama Sarkar; Souvik Kundu 002; Zihan Yin; Manas Garg; Ajey P. Jacob; Peter A. Beerel; Akhilesh R. Jaiswal (ACM Great Lakes Symposium on VLSI, 2023)

A Context-Switching/Dual-Context ROM Augmented RAM using Standard 8T SRAM. - Md. Abdullah-Al Kaiser; Edwin Tieu; Ajey P. Jacob; Akhilesh R. Jaiswal (ACM Great Lakes Symposium on VLSI, 2023)

In-Sensor & Neuromorphic Computing Are all You Need for Energy Efficient Computer Vision. - Gourav Datta; Zeyu Liu 003; Md. Abdullah-Al Kaiser; Souvik Kundu 002; Joe Mathai; Zihan Yin; Ajey P. Jacob; Akhilesh R. Jaiswal; Peter A. Beerel (ICASSP, 2023)

Design Considerations for 3D Heterogeneous Integration Driven Analog Processing-in-Pixel for Extreme-Edge Intelligence. - Zihan Yin; Gourav Datta; Md. Abdullah-Al Kaiser; Peter A. Beerel; Ajey P. Jacob; Akhilesh Jaiswal 001 (ICRC, 2023)

TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation. - David Bruce Cousins; Yuriy Polyakov; Ahmad Al Badawi; Matthew French; Andrew G. Schmidt; Ajey P. Jacob; Benedict Reynwar; Kellie Canida; Akhilesh R. Jaiswal; Clynn Mathew; Homer Gamil; Negar Neda; et al. (IACR Cryptol. ePrint Arch., 2023)

Neuromorphic-P2M: processing-in-pixel-in-memory paradigm for neuromorphic image sensors. - Md. Abdullah-Al Kaiser; Gourav Datta; Zixu Wang; Ajey P. Jacob; Peter A. Beerel; Akhilesh R. Jaiswal (Frontiers Neuroinformatics, 2023)

A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation. - Zihan Yin; Annewsha Datta; Shwetha Vijayakumar; Ajey P. Jacob; Akhilesh Jaiswal 001 (ACM Great Lakes Symposium on VLSI, 2024)

Predictive Performance of Photonic SRAM-Based in-Memory Computing for Tensor Decomposition. - Sasindu Wijeratne; Sugeet Sunder; Md. Abdullah-Al Kaiser; Akhilesh Jaiswal 001; Clynn Mathew; Ajey P. Jacob; Viktor K. Prasanna (HPEC, 2024)

Voltage-Controlled Magnetic Tunnel Junction based ADC-less Global Shutter Processing-in-Pixel for Extreme-Edge Intelligence. - Md. Abdullah-Al Kaiser; Gourav Datta; Jordan Athas; Christian Duffee; Ajey P. Jacob; Pedram Khalili Amiri; Peter A. Beerel; Akhilesh R. Jaiswal (CoRR, 2024)

X-pSRAM: A Photonic SRAM with Embedded XOR Logic for Ultra-Fast in-Memory Computing. - Md. Abdullah-Al Kaiser; Sugeet Sunder; Ajey P. Jacob; Akhilesh R. Jaiswal (ASAP, 2025)

A Mixed-Signal Photonic SRAM-based High-Speed Energy-Efficient Photonic Tensor Core with Novel Electro-Optic ADC. - Md. Abdullah-Al Kaiser; Sugeet Sunder; Ajey P. Jacob; Akhilesh R. Jaiswal (CoRR, 2025)