Reliability-Aware Scheduling on Heterogeneous Multicore Processors. - Ajeya Naithani; Stijn Eyerman; Lieven Eeckhout (HPCA, 2017)

Optimizing Soft Error Reliability Through Scheduling on Heterogeneous Multicore Processors. - Ajeya Naithani; Stijn Eyerman; Lieven Eeckhout (IEEE Trans. Computers, 2018)

Precise Runahead Execution. - Ajeya Naithani; Josué Feliu; Almutaz Adileh; Lieven Eeckhout (IEEE Comput. Archit. Lett., 2019)

The Forward Slice Core Microarchitecture. - Kartik Lakshminarasimhan; Ajeya Naithani; Josué Feliu; Lieven Eeckhout (PACT, 2020)

Vector Runahead. - Ajeya Naithani; Sam Ainsworth; Timothy M. Jones 001; Lieven Eeckhout (ISCA, 2021)

Reliability-Aware Runahead. - Ajeya Naithani; Lieven Eeckhout (HPCA, 2022)

Vector Runahead for Indirect Memory Accesses. - Ajeya Naithani; Sam Ainsworth; Timothy M. Jones 001; Lieven Eeckhout (IEEE Micro, 2022)

The Forward Slice Core: A High-Performance, Yet Low-Complexity Microarchitecture. - Kartik Lakshminarasimhan; Ajeya Naithani; Josué Feliu; Lieven Eeckhout (ACM Trans. Archit. Code Optim., 2022)

VMT: Virtualized Multi-Threading for Accelerating Graph Workloads on Commodity Processors. - Josué Feliu; Ajeya Naithani; Julio Sahuquillo; Salvador Petit; Moinuddin K. Qureshi; Lieven Eeckhout (IEEE Trans. Computers, 2022)

Decoupled Vector Runahead. - Ajeya Naithani; Jaime Roelandts; Sam Ainsworth; Timothy M. Jones 001; Lieven Eeckhout (MICRO, 2023)

Scalar Vector Runahead. - Jaime Roelandts; Ajeya Naithani; Sam Ainsworth; Timothy M. Jones 001; Lieven Eeckhout (MICRO, 2024)

Decoupled Vector Runahead for Prefetching Nested Memory-Access Chains. - Ajeya Naithani; Jaime Roelandts; Sam Ainsworth; Timothy M. Jones 001; Lieven Eeckhout (IEEE Micro, 2024)

The Architectural Sustainability Indicator. - Jaime Roelandts; Ajeya Naithani; Lieven Eeckhout (IEEE Comput. Archit. Lett., 2025)