Analog functional simulator for multilevel systems. - Genhong Ruan; Jirí Vlach; James A. Barby; Ajoy Opal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Group Delay Analysis of Switched Circuits. - Ajoy Opal (ISCAS, 1993)

Simulation of Networks with Inconsistent Initial Conditions. - Jirí Vlach; Ajoy Opal; Jacek Wojciechowski (ISCAS, 1993)

Zero State Response of Linear Circuits to Exponential Inputs. - Ajoy Opal; Kaamran Raahemifar (ISCAS, 1995)

Sampled data simulation of linear and nonlinear circuits. - Ajoy Opal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

The transition matrix for linear circuits. - Ajoy Opal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Sensitivity analysis of periodically switched linear circuits using an adjoint network technique. - Fei Yuan 005; Ajoy Opal (ISCAS (5), 1999)

Distortion analysis of periodically switched nonlinear circuits. - Fei Yuan 005; Ajoy Opal (ISCAS (5), 1999)

Time-domain thermal noise simulation of switched capacitor circuitsand delta-sigma modulators. - Jennifer Y. Dong; Ajoy Opal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

An overview on computer-aided analysis techniques for sigma-delta modulators. - Yikui Dong; Ajoy Opal (ISCAS (5), 2001)

An efficient transient analysis algorithm for mildly nonlinearcircuits. - Fei Yuan 005; Ajoy Opal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Inductive peaking in wideband CMOS current amplifiers. - Bendong Sun; Fei Yuan 005; Ajoy Opal (ISCAS (4), 2004)

Sensitivity analysis of nonlinear circuits using Volterra series. - Guoji Zhu; Ajoy Opal (ISCAS, 2006)

Per-Element Decompostion in Distortion Analysis. - Guoji Zhu; Ajoy Opal (ISCAS, 2007)

Analysis of power supply noise mitigation circuits. - Tasreen Charania; Pierce Chuang; Ajoy Opal; Manoj Sachdev (CCECE, 2011)

Suppression of on-chip power supply noise generated by a 64-bit static logic ALU block. - Tasreen Charania; Pierce Chuang; Ajoy Opal; Manoj Sachdev (VLSI-SoC, 2012)

Analysis and Design of On-Chip Decoupling Capacitors. - Tasreen Charania; Ajoy Opal; Manoj Sachdev (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A low-leakage, hybrid ESD power supply clamp in 65nm CMOS technology. - Mahdi Elghazali; Manoj Sachdev; Ajoy Opal (CICC, 2014)

A hybrid ESD clamp with thyristor delay element and diodes for low-leakage applications. - Mahdi Elghazali; Manoj Sachdev; Ajoy Opal (NEWCAS, 2014)

A Low-Leakage, Robust ESD Clamp with Thyristor Delay Element in 65 nm CMOS Technology. - Mahdi Elghazali; Manoj Sachdev; Ajoy Opal (ISVLSI, 2016)

An ESD transient clamp with 494 pA leakage current in GP 65 nm CMOS technology. - Mahdi Elghazali; Manoj Sachdev; Ajoy Opal (ISQED, 2018)