MePLER: A 20.6-pJ Side-Channel-Aware In-Memory CDT Sampler. - Dai Li; Yan He 002; Akhil Reddy Pakala; Kaiyuan Yang 001 (VLSI Circuits, 2021)

Reduced Memory Viterbi Decoding for Hardware-accelerated Speech Recognition. - Pani Prithvi Raj; Akhil Reddy Pakala; Nitin Chandrachoodan (ACM Trans. Embed. Comput. Syst., 2022)

MeNTT: A Compact and Efficient Processing-in-Memory Number Theoretic Transform (NTT) Accelerator. - Dai Li; Akhil Reddy Pakala; Kaiyuan Yang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro With In Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout. - Zhiyu Chen 003; Ziyuan Wen; Weier Wan; Akhil Reddy Pakala; Yiwei Zou; Wei-Chen Wei; Zengyi Li; Yubei Chen; Kaiyuan Yang 001 (IEEE J. Solid State Circuits, 2025)

MBSNTT: A Highly Parallel Digital In-Memory Bit-Serial Number Theoretic Transform Accelerator. - Akhil Reddy Pakala; Zhiyu Chen 003; Kaiyuan Yang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2025)