Akhilesh Jaiswal
Orcid: 0000-0001-9911-2624Affiliations:
- University of Southern California, Los Angeles, CA, USA
According to our database1,
Akhilesh Jaiswal
authored at least 55 papers
between 2016 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Toward High Performance, Programmable Extreme-Edge Intelligence for Neuromorphic Vision Sensors utilizing Magnetic Domain Wall Motion-based MTJ.
CoRR, 2024
2023
Neuromorphic-P2M: processing-in-pixel-in-memory paradigm for neuromorphic image sensors.
Frontiers Neuroinformatics, March, 2023
IACR Cryptol. ePrint Arch., 2023
Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural networks: from Algorithms to Technology.
CoRR, 2023
Hardware-Algorithm Co-design Enabling Processing-in-Pixel-in-Memory (P2M) for Neuromorphic Vision Sensors.
CoRR, 2023
A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation.
CoRR, 2023
Object Motion Sensitivity: A Bio-inspired Solution to the Ego-motion Problem for Event-based Cameras.
CoRR, 2023
Cryogenic In-Memory Bit-Serial Addition Using Quantum Anomalous Hall Effect-Based Majority Logic.
IEEE Access, 2023
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2023
Quantum Anomalous Hall Effect-Based Variation Robust Binary Content Addressable Memory.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Design Considerations for 3D Heterogeneous Integration Driven Analog Processing-in-Pixel for Extreme-Edge Intelligence.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023
In-Sensor & Neuromorphic Computing Are all You Need for Energy Efficient Computer Vision.
Proceedings of the IEEE International Conference on Acoustics, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
2022
P2M: A Processing-in-Pixel-in-Memory Paradigm for Resource-Constrained TinyML Applications.
CoRR, 2022
P<sup>2</sup>M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
Proceedings of the Computer Vision - ECCV 2022 Workshops, 2022
2021
CoRR, 2021
Augmented Memory Computing: Dynamically Augmented SRAM Storage for Data Intensive Applications.
CoRR, 2021
Intrinsic Spike Timing Dependent Plasticity in Stochastic Magnetic Tunnel Junctions Mediated by Heat Dynamics.
CoRR, 2021
HYPER-SNN: Towards Energy-efficient Quantized Deep Spiking Neural Networks for Hyperspectral Image Classification.
CoRR, 2021
IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks.
CoRR, 2021
2020
IEEE Trans. Circuits Syst., 2020
Functional Read Enabling In-Memory Computations in 1Transistor - 1Resistor Memory Arrays.
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
CoRR, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
On Robustness of Spin-Orbit-Torque Based Stochastic Sigmoid Neurons for Spiking Neural Networks.
Proceedings of the International Joint Conference on Neural Networks, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
2018
Designing Energy-Efficient Intermittently Powered Systems Using Spin-Hall-Effect-Based Nonvolatile SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2018
X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays.
CoRR, 2018
Capacitively Driven Global Interconnect with Magnetoelectric Switching Based Receiver for Higher Energy Efficiency.
CoRR, 2018
CoRR, 2018
2017
X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories.
CoRR, 2017
Magnetic Tunnel Junction Enabled Stochastic Spiking Neural Networks: From Non-Telegraphic to Telegraphic Switching Regime.
CoRR, 2017
CoRR, 2017
Proposal for a Leaky Integrate Fire Spiking Neuron Using Voltage Driven Domain Wall Motion.
CoRR, 2017
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
Stochastic Switching of SHE-MTJ as a Natural Annealer for Efficient Combinatorial Optimization.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
2016
Comprehensive Scaling Analysis of Current Induced Switching in Magnetic Memories Based on In-Plane and Perpendicular Anisotropies.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016
Ising spin model using Spin-Hall Effect (SHE) induced magnetization reversal in Magnetic-Tunnel-Junction.
CoRR, 2016
Proposal for a Leaky-Integrate-Fire Spiking Neuron based on Magneto-Electric Switching of Ferro-magnets.
CoRR, 2016
Proceedings of the 17th Latin-American Test Symposium, 2016
Significance driven hybrid 8T-6T SRAM for energy-efficient synaptic storage in artificial neural networks.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016