An Area-Efficient Out-of-Order Soft-Core Processor Without Register Renaming. - Junichiro Kadomoto; Toru Koizumi 001; Akifumi Fukuda; Reoma Matsuo; Susumu Mashimo; Akifumi Fujita; Ryota Shioya; Hidetsugu Irie; Shuichi Sakai (FPT, 2018)

An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor. - Susumu Mashimo; Koji Inoue; Ryota Shioya; Akifumi Fujita; Reoma Matsuo; Seiya Akaki; Akifumi Fukuda; Toru Koizumi 001; Junichiro Kadomoto; Hidetsugu Irie; Masahiro Goshima (FPT, 2019)