A bipolar-PMOS merged basic cell for 0.8 mu m BiCMOS sea of gates. - Toshiaki Hanibuchi; Masahiro Ueda; Keiichi Higashitani; Masahiro Hatanaka; Koichiro Mashiko; Akiharu Tada (IEEE J. Solid State Circuits, 1991)

A flexible multiport RAM compiler for data path. - Hirofumi Shinohara; Noriaki Matsumoto; Kumiko Fujimori; Yoshiki Tsujihashi; Hiroomi Nakao; Shuichi Kato; Yasutaka Horiba; Akiharu Tada (IEEE J. Solid State Circuits, 1991)