Instruction Scheduling for Power Reduction in Processor-Based System Design. - Hiroyuki Tomiyama; Tohru Ishihara; Akihiko Inoue; Hiroto Yasuura (DATE, 1998)

Instruction Encoding Techniques for Area Minimization of Instruction ROM. - Takanori Okuma; Hiroyuki Tomiyama; Akihiko Inoue; Eko Fajar; Hiroto Yasuura (ISSS, 1998)

Statistical Performance-Driven Module Binding in High-Level Synthesis. - Hiroyuki Tomiyama; Akihiko Inoue; Hiroto Yasuura (ISSS, 1998)

Embedded System Design Using Soft-Core Processor and Valen-C. - Hiroto Yasuura; Hiroyuki Tomiyama; Akihiko Inoue; Eko Fajar (J. Inf. Sci. Eng., 1998)

Flexible System LSI for Embedded Systems and Its Optimization Techniques. - Akihiko Inoue; Tohru Ishihara; Hiroto Yasuura (Des. Autom. Embed. Syst., 2000)

Exponentiating derivations of quasi ∗-algebras: possible approaches and applications. - Fabio Bagarello; Akihiko Inoue; Camillo Trapani (Int. J. Math. Math. Sci., 2005)

Closed-form expression for finite predictor coefficients of multivariate ARMA processes. - Akihiko Inoue (J. Multivar. Anal., 2020)

Explicit formulas for the inverses of Toeplitz matrices, with applications. - Akihiko Inoue (CoRR, 2021)