Microprogramming Design support System. - Akihiko Yamada; Akihiro Kawaguchi; Kazutoshi Takahashi; Shunichi Kato (DAC, 1974)

Automatic test generation for large digital circuits. - Akihiko Yamada; Nobuo Wakatsuki; Hideo Shibano; Osamu Itoh; Kyoji Tomita; Shigehiro Funatsu (DAC, 1977)

Automatic System Level Test Generation and Fault Location for Large Digital Systems. - Akihiko Yamada; Nobuo Wakatsuki; T. Fukui; Shigehiro Funatsu (DAC, 1978)

MIXS: A mixed level simulator for large digital system logic verification. - Tohru Sasaki; Akihiko Yamada; Shunichi Kato; Terufumi Nakazawa; Kyoji Tomita; Nobuyoshi Nomizu (DAC, 1980)

Hierarchical design verification for large digital systems. - Tohru Sasaki; Akihiko Yamada; Toshinori Aoyama; Katsutoshi Hasegawa; Shunichi Kato; Shinichi Sato (DAC, 1981)

Design automation status in Japan. - Akihiko Yamada (DAC, 1981)

A Calculus of Testability Measure at the Functional Level. - Shigeru Takasaki; Masato Kawai; Shigehiro Funatsu; Akihiko Yamada (ITC, 1981)

Timing verification system based on delay time hierarchical nature. - Minoru Nomura; Shinichi Sato; Nobuo Takano; Toshinori Aoyama; Akihiko Yamada (DAC, 1982)

MDS: An improved total system for firmware development. - Kazutoshi Takahashi; Etsuo Takahashi; Tatsushige Bitoh; Toshinori Aoyama; Akihiko Yamada (MICRO, 1982)

Design Automation for Large Mainframes and Supercomputers in NEC. - Akihiko Yamada (IFIP Congress, 1989)

Scan design at NEC. - Shigehiro Funatsu; Masato Kawai; Akihiko Yamada (IEEE Des. Test, 1989)

Logic simulation engines in Japan. - Shigeru Takasaki; Fumiyasu Hirose; Akihiko Yamada (IEEE Des. Test, 1989)

Challenge of design and test of ultra-large-scale circuits. - Akihiko Yamada (ITC, 1990)

A design method for oversampled paraunitary DFT filter banks using householder factorization. - K. Kajita; Hiroyuki Kobayashi; Shogo Muramatsu; Akihiko Yamada; Hitoshi Kiya (EUSIPCO, 1996)

A design method OF 2-D axial-symmetric paraunitary filter banks with a lattice structure. - Shogo Muramatsu; Akihiko Yamada; Hitoshi Kiya (EUSIPCO, 1998)

A design method of multidimensional linear-phase paraunitary filter banks with a lattice structure. - Shogo Muramatsu; Akihiko Yamada; Hitoshi Kiya (IEEE Trans. Signal Process., 1999)

Multi-subregion based probabilistic approach toward pose-invariant face recognition. - Takeo Kanade; Akihiko Yamada (CIRA, 2003)

Multi-subregion-based probabilistic approach to pose-invariant face recognition. - Akihiko Yamada; Takeo Kanade (Syst. Comput. Jpn., 2006)

Events and Sightings. - Chigusa Kita; Dag Spicer; Anne Fitzpatrick; Akihiko Yamada (IEEE Ann. Hist. Comput., 2007)

Robust Face Recognition Based on Modified ICA without Training Sample of Test Subjects. - Xian-Hua Han; Yen-Wei Chen 001; Akihiko Yamada; Hideto Fujita (IIH-MSP, 2008)

Events and Sightings. - Chigusa Kita; Thomas Haigh; Dag Spicer; Akihiko Yamada; Thomas J. Misa (IEEE Ann. Hist. Comput., 2008)

Events and Sightings. - Akihiko Yamada; Dag Spicer (IEEE Ann. Hist. Comput., 2012)

IPSJ Certifies 100 IP Technology Heritage Artifacts in 10 Years. - Akihiko Yamada (IEEE Ann. Hist. Comput., 2018)

Remarks on the Design of First Digital Computers in Japan - Contributions of Yasuo Komamiya. - Radomir S. Stankovic; Tsutomu Sasao; Jaakko T. Astola; Akihiko Yamada (EUROCAST (1), 2019)

Parametron and Relay Computers Exhibition Held at Tokyo University of Science in November, 2018. - Akihiko Yamada (IEEE Ann. Hist. Comput., 2019)

2018 NEC C&C Prize Ceremony. - Akihiko Yamada (IEEE Ann. Hist. Comput., 2019)

Iterative User Scheduling Method for MU-MIMO-OFDM Systems. - Akihiko Yamada; Satoshi Denno; Yafei Hou (GCCE, 2023)

Practical Uplink Multi-User MIMO Scheduling Based on Iterative Heuristic Search. - Satoshi Denno; Akihiko Yamada; Yafei Hou (IEICE Trans. Commun., 2025)